[PATCH] D99736: [MIPatternMatch]: Add matchers for binary instructions

[Petar Avramovic via Phabricator via llvm-commits]

Petar.Avramovic created this revision.
Petar.Avramovic requested review of this revision.
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Add matchers that support commutable and non-commutable binary opcodes.
Some matchers don't check opcode (useful if we already know the opcode)
while other check opcode via argument.


https://reviews.llvm.org/D99736

Files:
  llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h


Index: llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
===================================================================
--- llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
+++ llvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
@@ -256,6 +256,74 @@
   }
 };
 
+// Helper for (commutable) binary generic MI. Doesn't check opcode.
+template <typename LHS_P, typename RHS_P, bool Commutable = false>
+struct AnyBinaryOp_match {
+  LHS_P L;
+  RHS_P R;
+
+  AnyBinaryOp_match(const LHS_P &LHS, const RHS_P &RHS) : L(LHS), R(RHS) {}
+  template <typename OpTy>
+  bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
+    MachineInstr *TmpMI;
+    if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
+      if (TmpMI->getNumOperands() == 3) {
+        return matchOperands(MRI, TmpMI->getOperand(1).getReg(),
+                             TmpMI->getOperand(2).getReg());
+      }
+    }
+    return false;
+  }
+  bool matchOperands(const MachineRegisterInfo &MRI, Register Op0,
+                     Register Op1) {
+    return (L.match(MRI, Op0) && R.match(MRI, Op1)) ||
+           (Commutable && R.match(MRI, Op0) && L.match(MRI, Op1));
+  }
+};
+
+template <typename LHS, typename RHS>
+inline AnyBinaryOp_match<LHS, RHS, false> m_BinOp(const LHS &L, const RHS &R) {
+  return AnyBinaryOp_match<LHS, RHS, false>(L, R);
+}
+
+template <typename LHS, typename RHS>
+inline AnyBinaryOp_match<LHS, RHS, true> m_CommutableBinOp(const LHS &L,
+                                                           const RHS &R) {
+  return AnyBinaryOp_match<LHS, RHS, true>(L, R);
+}
+
+// Helper for (commutable) binary generic MI that checks Opcode.
+template <typename LHS_P, typename RHS_P, bool Commutable = false>
+struct BinaryOpWithOpcode_match : AnyBinaryOp_match<LHS_P, RHS_P, Commutable> {
+  unsigned Opcode;
+
+  BinaryOpWithOpcode_match(unsigned Opcode, const LHS_P &LHS, const RHS_P &RHS)
+      : AnyBinaryOp_match<LHS_P, RHS_P, Commutable>(LHS, RHS), Opcode(Opcode) {}
+  template <typename OpTy>
+  bool match(const MachineRegisterInfo &MRI, OpTy &&Op) {
+    MachineInstr *TmpMI;
+    if (mi_match(Op, MRI, m_MInstr(TmpMI))) {
+      if (TmpMI->getOpcode() == Opcode && TmpMI->getNumOperands() == 3) {
+        return this->matchOperands(MRI, TmpMI->getOperand(1).getReg(),
+                                   TmpMI->getOperand(2).getReg());
+      }
+    }
+    return false;
+  }
+};
+
+template <typename LHS, typename RHS>
+inline BinaryOpWithOpcode_match<LHS, RHS, false>
+m_BinOp(unsigned Opcode, const LHS &L, const RHS &R) {
+  return BinaryOpWithOpcode_match<LHS, RHS, false>(Opcode, L, R);
+}
+
+template <typename LHS, typename RHS>
+inline BinaryOpWithOpcode_match<LHS, RHS, true>
+m_CommutableBinOp(unsigned Opcode, const LHS &L, const RHS &R) {
+  return BinaryOpWithOpcode_match<LHS, RHS, true>(Opcode, L, R);
+}
+
 template <typename LHS, typename RHS>
 inline BinaryOp_match<LHS, RHS, TargetOpcode::G_ADD, true>
 m_GAdd(const LHS &L, const RHS &R) {


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