[PATCH] D99660: Use DL.getIndexType() in Value::getPointerAlignment()

[Alexander Richardson via Phabricator via llvm-commits]

arichardson created this revision.
arichardson added reviewers: lebedev.ri, nikic, jdoerfert.
Herald added subscribers: jrtc27, dexonsmith, arphaman, hiraditya, kristof.beyls.
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In the out-of-tree CHERI and Arm Morello backends pointers are 128 or 64
bits, but only 64/32 bits of those hold the address information (our
DataLayout strings use "-pf200:128:128:128:64"/"-pf200:64:64:64:32").
I recently merged https://reviews.llvm.org/D73131 and started seeing
assertions in various tests due to this i8 addrspace(200)* -> i128
ptrtoint.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D99660

Files:
  llvm/lib/IR/Value.cpp


Index: llvm/lib/IR/Value.cpp
===================================================================
--- llvm/lib/IR/Value.cpp
+++ llvm/lib/IR/Value.cpp
@@ -877,7 +877,7 @@
     }
   } else if (auto *CstPtr = dyn_cast<Constant>(this)) {
     if (auto *CstInt = dyn_cast_or_null<ConstantInt>(ConstantExpr::getPtrToInt(
-            const_cast<Constant *>(CstPtr), DL.getIntPtrType(getType()),
+            const_cast<Constant *>(CstPtr), DL.getIndexType(getType()),
             /*OnlyIfReduced=*/true))) {
       size_t TrailingZeros = CstInt->getValue().countTrailingZeros();
       // While the actual alignment may be large, elsewhere we have


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