[llvm] bd79b56 - [NFC][AArch64] Add codegen tests for various csinc-cmp sequences.
Pavel Iliin via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 17 13:18:04 PDT 2021
Author: Pavel Iliin
Date: 2021-03-17T20:17:40Z
New Revision: bd79b565e367794945c02d03f934618a230d7c59
URL: https://github.com/llvm/llvm-project/commit/bd79b565e367794945c02d03f934618a230d7c59
DIFF: https://github.com/llvm/llvm-project/commit/bd79b565e367794945c02d03f934618a230d7c59.diff
LOG: [NFC][AArch64] Add codegen tests for various csinc-cmp sequences.
Added:
llvm/test/CodeGen/AArch64/csinc-cmp-removal.mir
Modified:
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/csinc-cmp-removal.mir b/llvm/test/CodeGen/AArch64/csinc-cmp-removal.mir
new file mode 100644
index 000000000000..932c9aa21314
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/csinc-cmp-removal.mir
@@ -0,0 +1,313 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=aarch64 -run-pass=peephole-opt -verify-machineinstrs %s -o - | FileCheck %s
+---
+name: remove_subswr_after_csincwr
+tracksRegLiveness: true
+body: |
+ ; CHECK-LABEL: name: remove_subswr_after_csincwr
+ ; CHECK: bb.0:
+ ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
+ ; CHECK: liveins: $x1
+ ; CHECK: [[COPY:%[0-9]+]]:gpr64common = COPY $x1
+ ; CHECK: [[DEF:%[0-9]+]]:gpr64 = IMPLICIT_DEF
+ ; CHECK: [[SUBSXrr:%[0-9]+]]:gpr64 = SUBSXrr killed [[DEF]], [[COPY]], implicit-def $nzcv
+ ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32common = CSINCWr $wzr, $wzr, 1, implicit $nzcv
+ ; CHECK: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri killed [[CSINCWr]], 1, 0, implicit-def $nzcv
+ ; CHECK: Bcc 1, %bb.2, implicit $nzcv
+ ; CHECK: B %bb.1
+ ; CHECK: bb.1:
+ ; CHECK: successors: %bb.2(0x80000000)
+ ; CHECK: B %bb.2
+ ; CHECK: bb.2:
+ ; CHECK: RET_ReallyLR
+ bb.0:
+ liveins: $x1
+ successors: %bb.1(0x40000000), %bb.2(0x40000000)
+ %1:gpr64common = COPY $x1
+ %2:gpr64 = IMPLICIT_DEF
+ %3:gpr64 = SUBSXrr killed %2:gpr64, %1:gpr64common, implicit-def $nzcv
+ %4:gpr32common = CSINCWr $wzr, $wzr, 1, implicit $nzcv
+ %5:gpr32 = SUBSWri killed %4:gpr32common, 1, 0, implicit-def $nzcv
+ Bcc 1, %bb.2, implicit $nzcv
+ B %bb.1
+
+ bb.1:
+ successors: %bb.2(0x80000000)
+ B %bb.2
+
+ bb.2:
+ RET_ReallyLR
+
+...
+---
+name: remove_subsxr_after_csincxr_invertcc
+tracksRegLiveness: true
+body: |
+ ; CHECK-LABEL: name: remove_subsxr_after_csincxr_invertcc
+ ; CHECK: bb.0:
+ ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
+ ; CHECK: liveins: $x1
+ ; CHECK: [[COPY:%[0-9]+]]:gpr64common = COPY $x1
+ ; CHECK: [[DEF:%[0-9]+]]:gpr64 = IMPLICIT_DEF
+ ; CHECK: [[SUBSXrr:%[0-9]+]]:gpr64 = SUBSXrr killed [[DEF]], [[COPY]], implicit-def $nzcv
+ ; CHECK: [[CSINCXr:%[0-9]+]]:gpr64common = CSINCXr $xzr, $xzr, 1, implicit $nzcv
+ ; CHECK: [[SUBSXri:%[0-9]+]]:gpr64 = SUBSXri killed [[CSINCXr]], 0, 0, implicit-def $nzcv
+ ; CHECK: Bcc 0, %bb.2, implicit $nzcv
+ ; CHECK: B %bb.1
+ ; CHECK: bb.1:
+ ; CHECK: successors: %bb.2(0x80000000)
+ ; CHECK: B %bb.2
+ ; CHECK: bb.2:
+ ; CHECK: RET_ReallyLR
+ bb.0:
+ liveins: $x1
+ successors: %bb.1(0x40000000), %bb.2(0x40000000)
+ %1:gpr64common = COPY $x1
+ %2:gpr64 = IMPLICIT_DEF
+ %3:gpr64 = SUBSXrr killed %2:gpr64, %1:gpr64common, implicit-def $nzcv
+ %4:gpr64common = CSINCXr $xzr, $xzr, 1, implicit $nzcv
+ %5:gpr64 = SUBSXri killed %4:gpr64common, 0, 0, implicit-def $nzcv
+ Bcc 0, %bb.2, implicit $nzcv
+ B %bb.1
+
+ bb.1:
+ successors: %bb.2(0x80000000)
+ B %bb.2
+
+ bb.2:
+ RET_ReallyLR
+
+...
+---
+name: cflags_alive_in_succs
+tracksRegLiveness: true
+body: |
+ ; CHECK-LABEL: name: cflags_alive_in_succs
+ ; CHECK: bb.0:
+ ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
+ ; CHECK: liveins: $nzcv
+ ; CHECK: [[CSINCXr:%[0-9]+]]:gpr64common = CSINCXr $xzr, $xzr, 1, implicit $nzcv
+ ; CHECK: [[ADDSXri:%[0-9]+]]:gpr64 = ADDSXri killed [[CSINCXr]], 0, 0, implicit-def $nzcv
+ ; CHECK: Bcc 0, %bb.2, implicit $nzcv
+ ; CHECK: B %bb.1
+ ; CHECK: bb.1:
+ ; CHECK: successors: %bb.2(0x80000000)
+ ; CHECK: liveins: $nzcv
+ ; CHECK: B %bb.2
+ ; CHECK: bb.2:
+ ; CHECK: RET_ReallyLR
+ bb.0:
+ liveins: $nzcv
+ successors: %bb.1(0x40000000), %bb.2(0x40000000)
+ %1:gpr64common = CSINCXr $xzr, $xzr, 1, implicit $nzcv
+ %2:gpr64 = ADDSXri killed %1:gpr64common, 0, 0, implicit-def $nzcv
+ Bcc 0, %bb.2, implicit $nzcv
+ B %bb.1
+
+ bb.1:
+ liveins: $nzcv
+ successors: %bb.2(0x80000000)
+ B %bb.2
+
+ bb.2:
+ RET_ReallyLR
+
+...
+---
+name: nz_used_after_cmp
+tracksRegLiveness: true
+body: |
+ ; CHECK-LABEL: name: nz_used_after_cmp
+ ; CHECK: bb.0:
+ ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
+ ; CHECK: liveins: $nzcv
+ ; CHECK: [[CSINCXr:%[0-9]+]]:gpr64common = CSINCXr $xzr, $xzr, 1, implicit $nzcv
+ ; CHECK: [[ADDSXri:%[0-9]+]]:gpr64 = ADDSXri killed [[CSINCXr]], 0, 0, implicit-def $nzcv
+ ; CHECK: Bcc 4, %bb.2, implicit $nzcv
+ ; CHECK: B %bb.1
+ ; CHECK: bb.1:
+ ; CHECK: successors: %bb.2(0x80000000)
+ ; CHECK: B %bb.2
+ ; CHECK: bb.2:
+ ; CHECK: RET_ReallyLR
+ bb.0:
+ liveins: $nzcv
+ successors: %bb.1(0x40000000), %bb.2(0x40000000)
+ %1:gpr64common = CSINCXr $xzr, $xzr, 1, implicit $nzcv
+ %2:gpr64 = ADDSXri killed %1:gpr64common, 0, 0, implicit-def $nzcv
+ Bcc 4, %bb.2, implicit $nzcv
+ B %bb.1
+
+ bb.1:
+ successors: %bb.2(0x80000000)
+ B %bb.2
+
+ bb.2:
+ RET_ReallyLR
+
+...
+---
+name: remove_addswr_after_csincwr_invertcc
+tracksRegLiveness: true
+body: |
+ ; CHECK-LABEL: name: remove_addswr_after_csincwr_invertcc
+ ; CHECK: bb.0:
+ ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
+ ; CHECK: liveins: $nzcv
+ ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32common = CSINCWr $wzr, $wzr, 1, implicit $nzcv
+ ; CHECK: [[ADDSWri:%[0-9]+]]:gpr32 = ADDSWri killed [[CSINCWr]], 0, 0, implicit-def $nzcv
+ ; CHECK: Bcc 1, %bb.2, implicit $nzcv
+ ; CHECK: B %bb.1
+ ; CHECK: bb.1:
+ ; CHECK: successors: %bb.2(0x80000000)
+ ; CHECK: B %bb.2
+ ; CHECK: bb.2:
+ ; CHECK: RET_ReallyLR
+ bb.0:
+ liveins: $nzcv
+ successors: %bb.1(0x40000000), %bb.2(0x40000000)
+ %1:gpr32common = CSINCWr $wzr, $wzr, 1, implicit $nzcv
+ %2:gpr32 = ADDSWri killed %1:gpr32common, 0, 0, implicit-def $nzcv
+ Bcc 1, %bb.2, implicit $nzcv
+ B %bb.1
+
+ bb.1:
+ successors: %bb.2(0x80000000)
+ B %bb.2
+
+ bb.2:
+ RET_ReallyLR
+
+...
+---
+name: cv_used_after_cmp
+tracksRegLiveness: true
+body: |
+ ; CHECK-LABEL: name: cv_used_after_cmp
+ ; CHECK: bb.0:
+ ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
+ ; CHECK: liveins: $nzcv
+ ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32common = CSINCWr $wzr, $wzr, 1, implicit $nzcv
+ ; CHECK: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri killed [[CSINCWr]], 0, 0, implicit-def $nzcv
+ ; CHECK: Bcc 2, %bb.2, implicit $nzcv
+ ; CHECK: B %bb.1
+ ; CHECK: bb.1:
+ ; CHECK: successors: %bb.2(0x80000000)
+ ; CHECK: B %bb.2
+ ; CHECK: bb.2:
+ ; CHECK: RET_ReallyLR
+ bb.0:
+ liveins: $nzcv
+ successors: %bb.1(0x40000000), %bb.2(0x40000000)
+ %1:gpr32common = CSINCWr $wzr, $wzr, 1, implicit $nzcv
+ %2:gpr32 = SUBSWri killed %1:gpr32common, 0, 0, implicit-def $nzcv
+ Bcc 2, %bb.2, implicit $nzcv
+ B %bb.1
+
+ bb.1:
+ successors: %bb.2(0x80000000)
+ B %bb.2
+
+ bb.2:
+ RET_ReallyLR
+
+...
+---
+name: csinc_add0
+tracksRegLiveness: true
+body: |
+ ; CHECK-LABEL: name: csinc_add0
+ ; CHECK: bb.0:
+ ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
+ ; CHECK: liveins: $nzcv
+ ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32common = CSINCWr $wzr, $wzr, 4, implicit $nzcv
+ ; CHECK: [[ADDSWri:%[0-9]+]]:gpr32 = ADDSWri killed [[CSINCWr]], 0, 0, implicit-def $nzcv
+ ; CHECK: Bcc 1, %bb.2, implicit $nzcv
+ ; CHECK: B %bb.1
+ ; CHECK: bb.1:
+ ; CHECK: successors: %bb.2(0x80000000)
+ ; CHECK: B %bb.2
+ ; CHECK: bb.2:
+ ; CHECK: RET_ReallyLR
+ bb.0:
+ liveins: $nzcv
+ successors: %bb.1(0x40000000), %bb.2(0x40000000)
+ %1:gpr32common = CSINCWr $wzr, $wzr, 4, implicit $nzcv
+ %2:gpr32 = ADDSWri killed %1:gpr32common, 0, 0, implicit-def $nzcv
+ Bcc 1, %bb.2, implicit $nzcv
+ B %bb.1
+
+ bb.1:
+ successors: %bb.2(0x80000000)
+ B %bb.2
+
+ bb.2:
+ RET_ReallyLR
+
+...
+---
+name: remove_subs1_after_csincN_invertcc
+tracksRegLiveness: true
+body: |
+ ; CHECK-LABEL: name: remove_subs1_after_csincN_invertcc
+ ; CHECK: bb.0:
+ ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
+ ; CHECK: liveins: $nzcv
+ ; CHECK: [[CSINCWr:%[0-9]+]]:gpr32common = CSINCWr $wzr, $wzr, 5, implicit $nzcv
+ ; CHECK: [[SUBSWri:%[0-9]+]]:gpr32 = SUBSWri killed [[CSINCWr]], 1, 0, implicit-def $nzcv
+ ; CHECK: Bcc 4, %bb.2, implicit $nzcv
+ ; CHECK: B %bb.1
+ ; CHECK: bb.1:
+ ; CHECK: successors: %bb.2(0x80000000)
+ ; CHECK: B %bb.2
+ ; CHECK: bb.2:
+ ; CHECK: RET_ReallyLR
+ bb.0:
+ liveins: $nzcv
+ successors: %bb.1(0x40000000), %bb.2(0x40000000)
+ %1:gpr32common = CSINCWr $wzr, $wzr, 5, implicit $nzcv
+ %2:gpr32 = SUBSWri killed %1:gpr32common, 1, 0, implicit-def $nzcv
+ Bcc 4, %bb.2, implicit $nzcv
+ B %bb.1
+
+ bb.1:
+ successors: %bb.2(0x80000000)
+ B %bb.2
+
+ bb.2:
+ RET_ReallyLR
+
+...
+---
+name: csinc_wrong_cc
+tracksRegLiveness: true
+body: |
+ ; CHECK-LABEL: name: csinc_wrong_cc
+ ; CHECK: bb.0:
+ ; CHECK: successors: %bb.1(0x40000000), %bb.2(0x40000000)
+ ; CHECK: liveins: $nzcv
+ ; CHECK: [[CSINCXr:%[0-9]+]]:gpr64common = CSINCXr $xzr, $xzr, 2, implicit $nzcv
+ ; CHECK: [[SUBSXri:%[0-9]+]]:gpr64 = SUBSXri killed [[CSINCXr]], 1, 0, implicit-def $nzcv
+ ; CHECK: Bcc 0, %bb.2, implicit $nzcv
+ ; CHECK: B %bb.1
+ ; CHECK: bb.1:
+ ; CHECK: successors: %bb.2(0x80000000)
+ ; CHECK: B %bb.2
+ ; CHECK: bb.2:
+ ; CHECK: RET_ReallyLR
+ bb.0:
+ liveins: $nzcv
+ successors: %bb.1(0x40000000), %bb.2(0x40000000)
+ %1:gpr64common = CSINCXr $xzr, $xzr, 2, implicit $nzcv
+ %2:gpr64 = SUBSXri killed %1:gpr64common, 1, 0, implicit-def $nzcv
+ Bcc 0, %bb.2, implicit $nzcv
+ B %bb.1
+
+ bb.1:
+ successors: %bb.2(0x80000000)
+ B %bb.2
+
+ bb.2:
+ RET_ReallyLR
+
+...
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