[PATCH] D61259: AArch64: support arm64_32, an ILP32 slice for watchOS.

[Tim Northover via Phabricator via llvm-commits]

t.p.northover added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64FastISel.cpp:531
+    (void)CPN;
+    assert(CPN->getType()->getPointerAddressSpace() == 0 &&
+           "Unexpected address space");
----------------
loladiro wrote:
> @t.p.northover Out of curiosity, what is this assertion guarding against? In our frontend we use non-zero address spaces to indicate GC-tracked pointers, which we expect to be ignored by the backend (stripping them is possible of course, but the performance impact is surprisingly high). As far as I can tell this is the only place in the Aarch64 backend that looks at address spaces and we encountered it when trying to port to Apple Silicon (not quite sure why nobody complained on linux, but maybe people didn't run with assertions).
I'm afraid I don't remember, but it looks overcautious to me now as well. I've just removed the check from `main`.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D61259/new/

https://reviews.llvm.org/D61259