[PATCH] D96961: [AArch64][SVE][DAGCombine] Factor out redundant SVE mul/fmul intrinsics

[Joe Ellis via Phabricator via llvm-commits]

joechrisellis updated this revision to Diff 324998.
joechrisellis marked 2 inline comments as done.
joechrisellis added a comment.

Address @david-arm's comments.

- more general implementation.
- factor out checking for `ptrue(SV_ALL)` intrinsic calls to `isPTrueAllIntrinsic`.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D96961/new/

https://reviews.llvm.org/D96961

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/sve-mul-fmul-idempotency.ll

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