[PATCH] D96015: [RegAllocFast] Handle case where operand of copy cannot be assigned.

Florian Hahn via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 4 05:57:08 PST 2021


fhahn added a comment.

In D96015#2541829 <https://reviews.llvm.org/D96015#2541829>, @arsenm wrote:

> My first thoughts is there should be no scan or instruction moving necessary. Why can't you just spill registers to satisfy this? The MIR test would help understand this

The problem is all registers in the required class are `pre-assigned` and cannot be spilled  (according to `RegAllocFast::calcSpillCost` https://github.com/llvm/llvm-project/blob/main/llvm/lib/CodeGen/RegAllocFast.cpp#L598)

The MIR for the problematic block is below. It cannot find a register for `%8` in `  $al = COPY %8`, because all register in the class for `%8` are defined between `  $al = COPY %8` and `%8:gr8 = MOV8ri 2`

  bb.3.bb5:
    successors: %bb.4(0x40000000), %bb.5(0x40000000)
  
    %5:gr8_norex = COPY %4.sub_8bit_hi
    %6:gr32_norex = MOVZX32rr8_NOREX killed %5
    EH_LABEL <mcsymbol >
    ADJCALLSTACKDOWN64 0, 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
    %7:gr32 = MOV32ri 3427
    %8:gr8 = MOV8ri 2
    %9:gr64 = IMPLICIT_DEF
    $rdi = COPY %9
    $esi = COPY %7
    %10:gr64 = IMPLICIT_DEF
    $rdx = COPY %10
    %11:fr64 = IMPLICIT_DEF
    $xmm0 = COPY %11
    %12:fr64 = IMPLICIT_DEF
    $xmm1 = COPY %12
    %13:gr32 = IMPLICIT_DEF
    $ecx = COPY %13
    $r8d = COPY %6
    $al = COPY %8
    CALL64pcrel32 target-flags(x86-plt) @baz, csr_64, implicit $rsp, implicit $ssp, implicit $rdi, implicit $esi, implicit $rdx, implicit $xmm0, implicit $xmm1, implicit $ecx, implicit $r8d, implicit $al, implicit-def $rsp, implicit-def $ssp
    ADJCALLSTACKUP64 0, 0, implicit-def dead $rsp, implicit-def dead $eflags, implicit-def dead $ssp, implicit $rsp, implicit $ssp
    EH_LABEL <mcsymbol >
    JMP_1 %bb.4


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