[PATCH] D89170: [AMDGPU] Use flat scratch instructions where available

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added a comment.

In D89170#2347139 <https://reviews.llvm.org/D89170#2347139>, @arsenm wrote:

> In D89170#2345943 <https://reviews.llvm.org/D89170#2345943>, @rampitec wrote:
>
>> I also came to conclusion that the only robust way to have no failed scavenging during frame lowering is to always have an sp or fp. Otherwise it can fail regardless of the spilling method. The only other way is to have an instruction with full 32 bit immediate offset. I.e. it can fail in a kernel with MUBUF as well.
>
> I was considering requiring an FP if the stack size was starting to hit the offset limit, but was unable to come up with a testcase where it would really break

This sounds like a good idea. We can run into a situation when we can scavenge nothing at all, even if it is not easy to forge a testcase. That is more so with flat scratch until ST mode is available as you always need a register as a base. In fact in this scenario it may be needed even if potential offsets are small. Then we do not need buffer descriptor with flat scratch, so we are saving 4 SGPRs. It sounds fair to use one for the base pointer instead.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D89170/new/

https://reviews.llvm.org/D89170