[PATCH] D90024: [ARM][SchedModels] Get rid of IsLdrAm2ScaledPred

[Andrea Di Biagio via Phabricator via llvm-commits]

andreadb added a comment.

So, it doesn't look like the lowering is doing anything odd with the operand sequence. It should be fine.
At this point, the only explanation is that the original predicate was never really executed for that write variant. So it was never tested. I don't see other alternatives honestly.


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  https://reviews.llvm.org/D90024/new/

https://reviews.llvm.org/D90024