[llvm] 9e7667e - [InstCombine] Add initial bitreverse test coverage

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2020-10-23T15:39:56+01:00
New Revision: 9e7667e2ad4838cf213fcd73782d5a70a657c058

URL: https://github.com/llvm/llvm-project/commit/9e7667e2ad4838cf213fcd73782d5a70a657c058
DIFF: https://github.com/llvm/llvm-project/commit/9e7667e2ad4838cf213fcd73782d5a70a657c058.diff

LOG: [InstCombine] Add initial bitreverse test coverage

Added: 
    llvm/test/Transforms/InstCombine/bitreverse.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/bitreverse.ll b/llvm/test/Transforms/InstCombine/bitreverse.ll
new file mode 100644
index 000000000000..1b84119bcb42
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/bitreverse.ll
@@ -0,0 +1,85 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
+
+;unsigned char rev8(unsigned char x) {
+;  unsigned char y;
+;  y = x&0x55; x ^= y; x |= (y<<2)|(y>>6);
+;  y = x&0x66; x ^= y; x |= (y<<4)|(y>>4);
+;  return (x<<1)|(x>>7);
+;}
+
+define i8 @test1(i8 %0) {
+; CHECK-LABEL: @test1(
+; CHECK-NEXT:    [[TMP2:%.*]] = and i8 [[TMP0:%.*]], 85
+; CHECK-NEXT:    [[TMP3:%.*]] = and i8 [[TMP0]], -86
+; CHECK-NEXT:    [[TMP4:%.*]] = shl i8 [[TMP2]], 2
+; CHECK-NEXT:    [[TMP5:%.*]] = lshr i8 [[TMP2]], 6
+; CHECK-NEXT:    [[TMP6:%.*]] = or i8 [[TMP5]], [[TMP3]]
+; CHECK-NEXT:    [[TMP7:%.*]] = or i8 [[TMP6]], [[TMP4]]
+; CHECK-NEXT:    [[TMP8:%.*]] = and i8 [[TMP7]], 102
+; CHECK-NEXT:    [[TMP9:%.*]] = and i8 [[TMP7]], 25
+; CHECK-NEXT:    [[TMP10:%.*]] = lshr i8 [[TMP8]], 4
+; CHECK-NEXT:    [[TMP11:%.*]] = or i8 [[TMP10]], [[TMP9]]
+; CHECK-NEXT:    [[TMP12:%.*]] = shl i8 [[TMP8]], 5
+; CHECK-NEXT:    [[TMP13:%.*]] = shl nuw nsw i8 [[TMP11]], 1
+; CHECK-NEXT:    [[TMP14:%.*]] = or i8 [[TMP12]], [[TMP13]]
+; CHECK-NEXT:    [[TMP15:%.*]] = lshr i8 [[TMP0]], 7
+; CHECK-NEXT:    [[TMP16:%.*]] = or i8 [[TMP14]], [[TMP15]]
+; CHECK-NEXT:    ret i8 [[TMP16]]
+;
+  %2 = and i8 %0, 85
+  %3 = xor i8 %0, %2
+  %4 = shl i8 %2, 2
+  %5 = lshr i8 %2, 6
+  %6 = or i8 %5, %3
+  %7 = or i8 %6, %4
+  %8 = and i8 %7, 102
+  %9 = xor i8 %7, %8
+  %10 = lshr i8 %8, 4
+  %11 = or i8 %10, %9
+  %12 = shl i8 %8, 5
+  %13 = shl i8 %11, 1
+  %14 = or i8 %12, %13
+  %15 = lshr i8 %0, 7
+  %16 = or i8 %14, %15
+  ret i8 %16
+}
+
+define <2 x i8> @test1_vector(<2 x i8> %0) {
+; CHECK-LABEL: @test1_vector(
+; CHECK-NEXT:    [[TMP2:%.*]] = and <2 x i8> [[TMP0:%.*]], <i8 85, i8 85>
+; CHECK-NEXT:    [[TMP3:%.*]] = and <2 x i8> [[TMP0]], <i8 -86, i8 -86>
+; CHECK-NEXT:    [[TMP4:%.*]] = shl <2 x i8> [[TMP2]], <i8 2, i8 2>
+; CHECK-NEXT:    [[TMP5:%.*]] = lshr <2 x i8> [[TMP2]], <i8 6, i8 6>
+; CHECK-NEXT:    [[TMP6:%.*]] = or <2 x i8> [[TMP5]], [[TMP3]]
+; CHECK-NEXT:    [[TMP7:%.*]] = or <2 x i8> [[TMP6]], [[TMP4]]
+; CHECK-NEXT:    [[TMP8:%.*]] = and <2 x i8> [[TMP7]], <i8 102, i8 102>
+; CHECK-NEXT:    [[TMP9:%.*]] = and <2 x i8> [[TMP7]], <i8 25, i8 25>
+; CHECK-NEXT:    [[TMP10:%.*]] = lshr <2 x i8> [[TMP8]], <i8 4, i8 4>
+; CHECK-NEXT:    [[TMP11:%.*]] = or <2 x i8> [[TMP10]], [[TMP9]]
+; CHECK-NEXT:    [[TMP12:%.*]] = shl <2 x i8> [[TMP8]], <i8 5, i8 5>
+; CHECK-NEXT:    [[TMP13:%.*]] = shl nuw nsw <2 x i8> [[TMP11]], <i8 1, i8 1>
+; CHECK-NEXT:    [[TMP14:%.*]] = or <2 x i8> [[TMP12]], [[TMP13]]
+; CHECK-NEXT:    [[TMP15:%.*]] = lshr <2 x i8> [[TMP0]], <i8 7, i8 7>
+; CHECK-NEXT:    [[TMP16:%.*]] = or <2 x i8> [[TMP14]], [[TMP15]]
+; CHECK-NEXT:    ret <2 x i8> [[TMP16]]
+;
+  %2 = and <2 x i8> %0, <i8 85, i8 85>
+  %3 = xor <2 x i8> %0, %2
+  %4 = shl <2 x i8> %2, <i8 2, i8 2>
+  %5 = lshr <2 x i8> %2, <i8 6, i8 6>
+  %6 = or <2 x i8> %5, %3
+  %7 = or <2 x i8> %6, %4
+  %8 = and <2 x i8> %7, <i8 102, i8 102>
+  %9 = xor <2 x i8> %7, %8
+  %10 = lshr <2 x i8> %8, <i8 4, i8 4>
+  %11 = or <2 x i8> %10, %9
+  %12 = shl <2 x i8> %8, <i8 5, i8 5>
+  %13 = shl <2 x i8> %11, <i8 1, i8 1>
+  %14 = or <2 x i8> %12, %13
+  %15 = lshr <2 x i8> %0, <i8 7, i8 7>
+  %16 = or <2 x i8> %14, %15
+  ret <2 x i8> %16
+}