[PATCH] D89964: [WIP][SDag] Allow targets to simplify generic nodes using demanded bits info

Roman Lebedev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 22 08:09:53 PDT 2020


lebedev.ri added a comment.

Much like with a similar InstCombine question, i'm on the edge about this.



================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:34052-34066
 void X86TargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
                                                       KnownBits &Known,
                                                       const APInt &DemandedElts,
                                                       const SelectionDAG &DAG,
                                                       unsigned Depth) const {
   unsigned BitWidth = Known.getBitWidth();
   unsigned NumElts = DemandedElts.getBitWidth();
----------------
I think you want to instead add a `computeKnownBitsUsingTargetKnowledge()`


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D89964/new/

https://reviews.llvm.org/D89964



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