[PATCH] D87651: [AArch64][SVE] Implement extractelement of i1 vectors.

[Eli Friedman via Phabricator via llvm-commits]

efriedma updated this revision to Diff 299476.
efriedma edited the summary of this revision.
efriedma added a comment.

Rebase and clang-format.

I looked into handling this in LegalizeVectorOps, but that doesn't really work out: we actually legalize EXTRACT_VECTOR_ELT nodes in LegalizeDAG.  And I don't want to do this in LegalizeDAG: LegalizeDAG can't handle arbitrary illegal vector operations.

There might be some way to sort out this mess, but it isn't trivial.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87651/new/

https://reviews.llvm.org/D87651

Files:
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/sve-extract-element.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D87651.299476.patch
Type: text/x-patch
Size: 4716 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20201020/ee11d67f/attachment.bin>