[PATCH] D89460: [ARM][SchedModels] Convert IsCPSRDefinedPred to MCSchedPredicate

Dave Green via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 19 02:21:52 PDT 2020


dmgreen added inline comments.


================
Comment at: llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp:192
+    const MCOperand &MO = MI.getOperand(I);
+    if (MO.isReg() && MO.getReg() == ARM::CPSR)
+      return true;
----------------
It's not possible to check this is a Def?

I see a mvneq is not changed though. I'm guessing that predicate info is not added to MCInsts?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D89460/new/

https://reviews.llvm.org/D89460



More information about the llvm-commits mailing list