[PATCH] D89458: [ARM][SchedModels] Convert IsPredicatedPred to MCSchedPredicate

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

ARM changes look good to me.

This adds an extra pointer into MCInst? So something like changing an instruction from 32byte + 16bytes per operand to 40bytes + 16bytes per operand. I'm not sure how much a change like that would matter, but if we have the other patch and we don't know of any other uses for Desc, perhaps that is the more conservative route. I don't have a very strong opinions either way though.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D89458/new/

https://reviews.llvm.org/D89458