[PATCH] D89610: AMDGPU: Fix missing read/writelane cases to skip with exec=0

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: rampitec, nhaehnle, foad, kerbowa.
Herald added subscribers: hiraditya, t-tye, tpr, dstuttard, yaxunl, jvesely, kzhuravl.
Herald added a project: LLVM.
arsenm requested review of this revision.
Herald added a subscriber: wdng.

Writelane was missing. Additionally, since we emit the final encoded
instructions, this wasn't really matching readlane either.


https://reviews.llvm.org/D89610

Files:
  llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  llvm/test/CodeGen/AMDGPU/remove-short-exec-branches-mode-def.mir
  llvm/test/CodeGen/AMDGPU/remove-short-exec-branches-special-instructions.mir

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