[PATCH] D89419: [AArch64][GlobalISel] Don't use explicit zero registers for compare results.

[Amara Emerson via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG78ccb0359d8d: [AArch64][GlobalISel] Don't use explicit zero registers for compare results. (authored by aemerson).

Changed prior to commit:
  https://reviews.llvm.org/D89419?vs=298216&id=298262#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D89419/new/

https://reviews.llvm.org/D89419

Files:
  llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/fold-fp-select.mir
  llvm/test/CodeGen/AArch64/GlobalISel/fold-select.mir
  llvm/test/CodeGen/AArch64/GlobalISel/opt-and-tbnz-tbz.mir
  llvm/test/CodeGen/AArch64/GlobalISel/opt-fold-compare.mir
  llvm/test/CodeGen/AArch64/GlobalISel/opt-shifted-reg-compare.mir
  llvm/test/CodeGen/AArch64/GlobalISel/preselect-process-phis.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-arith-immed-compare.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-cbz.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-cmp.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-jump-table-brjt-constrain.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-jump-table-brjt.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-select.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select.mir
  llvm/test/CodeGen/AArch64/GlobalISel/tbnz-slt.mir
  llvm/test/CodeGen/AArch64/GlobalISel/tbz-sgt.mir

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