[PATCH] D89217: [AMDGPU] Base getSubRegFromChannel on TableGen data

Tue Oct 13 18:45:05 PDT 2020

critson added inline comments.

================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:45
+
+static const uint16_t SubRegFromChannelTableWidthMap[17] = {
+    0, 1, 2, 3, 4, 5, 6, 7, 8, 0, 0, 0, 0, 0, 0, 0, 9};
----------------
foad wrote:
> critson wrote:
> > rampitec wrote:
> > > This could use a comment.
> > Added a detailed comment.
> It doesn't explain what the 9 means. 9-1 is not a valid index into SubRegFromChannelTable. Also you have a double full stop at the end.
Apparently I forgot to increase the array size and this magically did not create any problems.  My assertions were also not tight enough to catch this.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D89217/new/

https://reviews.llvm.org/D89217