[PATCH] D89316: [AMDGPU][GlobalISel] Compute known bits for zero-extending loads

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 13 07:38:18 PDT 2020


arsenm added a comment.

This could do better by checking the range metadata on the memory operand, but I don't think that's wired into the IR->MIR lowering now (if we ever even attach this to intrinsic calls)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D89316/new/

https://reviews.llvm.org/D89316



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