[PATCH] D86203: [GlobalISel][TableGen] Add handling of unannotated dst pattern ops

[Jay Foad via Phabricator via llvm-commits]

foad added a comment.

> Querying the register bank bank for VS_32 doesn't make any sense, and I suspect would assert.

Would it really be so bad for AMDGPU to define getRegBankFromRegClass(VS_32) == VGPRRegBank in order to get the behaviour it wants from imported patterns?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D86203/new/

https://reviews.llvm.org/D86203