[PATCH] D89084: [PowerPC] Combine select_cc (x, 0, t, f, lt) to avoid generating `isel`

[ChenZheng via Phabricator via llvm-commits]

shchenz added inline comments.


================
Comment at: llvm/test/CodeGen/PowerPC/select.ll:56
+; CHECK-LE-NEXT:    rlwinm r3, r3, 0, 0, 0
+; CHECK-LE-NEXT:    subfic r3, r3, 1
+; CHECK-LE-NEXT:    blr
----------------
This seems to be always profitable. Maybe we can do this transformation in `void PPCDAGToDAGISel::Select(SDNode *N) {}`?
We can transform it like:
```
 select_cc (x, 0, t, f, lt)
```
-> `subfic (rlwinm)` if (`f` > `t`)
or
-> `addi (rlwinm)` if (`f` <= `t`)?


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