[PATCH] D89042: LLD/AMDGPU: Infer os abi based on input llvm bitcode

[Konstantin Zhuravlyov via Phabricator via llvm-commits]

kzhuravl created this revision.
kzhuravl added reviewers: arsenm, ruiu, t-tye.
Herald added subscribers: dexonsmith, steven_wu, hiraditya, arichardson, tpr, dstuttard, yaxunl, jvesely, emaste.
Herald added a reviewer: espindola.
Herald added a reviewer: MaskRay.
kzhuravl requested review of this revision.
Herald added a subscriber: wdng.

https://reviews.llvm.org/D89042

Files:
  lld/ELF/InputFiles.cpp
  lld/test/ELF/lto/amdgcn-amdhsa.ll
  lld/test/ELF/lto/amdgcn-amdpal.ll
  lld/test/ELF/lto/amdgcn-mesa3d.ll


Index: lld/test/ELF/lto/amdgcn-mesa3d.ll
===================================================================
--- /dev/null
+++ lld/test/ELF/lto/amdgcn-mesa3d.ll
@@ -0,0 +1,14 @@
+; REQUIRES: amdgpu
+; RUN: llvm-as %s -o %t.o
+; RUN: ld.lld %t.o -o %t
+; RUN: llvm-readobj --file-headers %t | FileCheck %s
+
+; CHECK: OS/ABI: AMDGPU_MESA3D (0x42)
+; CHECK: ABIVersion: 0
+
+target triple = "amdgcn-amd-mesa3d"
+target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
+
+define void @_start() {
+  ret void
+}
Index: lld/test/ELF/lto/amdgcn-amdpal.ll
===================================================================
--- /dev/null
+++ lld/test/ELF/lto/amdgcn-amdpal.ll
@@ -0,0 +1,14 @@
+; REQUIRES: amdgpu
+; RUN: llvm-as %s -o %t.o
+; RUN: ld.lld %t.o -o %t
+; RUN: llvm-readobj --file-headers %t | FileCheck %s
+
+; CHECK: OS/ABI: AMDGPU_PAL (0x41)
+; CHECK: ABIVersion: 0
+
+target triple = "amdgcn-amd-amdpal"
+target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
+
+define void @_start() {
+  ret void
+}
Index: lld/test/ELF/lto/amdgcn-amdhsa.ll
===================================================================
--- /dev/null
+++ lld/test/ELF/lto/amdgcn-amdhsa.ll
@@ -0,0 +1,14 @@
+; REQUIRES: amdgpu
+; RUN: llvm-as %s -o %t.o
+; RUN: ld.lld %t.o -o %t
+; RUN: llvm-readobj --file-headers %t | FileCheck %s
+
+; CHECK: OS/ABI: AMDGPU_HSA (0x40)
+; CHECK: ABIVersion: 0
+
+target triple = "amdgcn-amd-amdhsa"
+target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
+
+define void @_start() {
+  ret void
+}
Index: lld/ELF/InputFiles.cpp
===================================================================
--- lld/ELF/InputFiles.cpp
+++ lld/ELF/InputFiles.cpp
@@ -1555,6 +1555,19 @@
   }
 }
 
+static uint8_t getOsAbi(const Triple &t) {
+  switch (t.getOS()) {
+  case Triple::AMDHSA:
+    return ELF::ELFOSABI_AMDGPU_HSA;
+  case Triple::AMDPAL:
+    return ELF::ELFOSABI_AMDGPU_PAL;
+  case Triple::Mesa3D:
+    return ELF::ELFOSABI_AMDGPU_MESA3D;
+  default:
+    return ELF::ELFOSABI_NONE;
+  }
+}
+
 BitcodeFile::BitcodeFile(MemoryBufferRef mb, StringRef archiveName,
                          uint64_t offsetInArchive)
     : InputFile(BitcodeKind, mb) {
@@ -1582,6 +1595,7 @@
   Triple t(obj->getTargetTriple());
   ekind = getBitcodeELFKind(t);
   emachine = getBitcodeMachineKind(mb.getBufferIdentifier(), t);
+  osabi = getOsAbi(t);
 }
 
 static uint8_t mapVisibility(GlobalValue::VisibilityTypes gvVisibility) {


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