[llvm] bef27e5 - [NFC][InstCombine] Autogenerate a few tests being affected by upcoming patch
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 7 09:00:32 PDT 2020
Author: Roman Lebedev
Date: 2020-10-07T19:00:08+03:00
New Revision: bef27e50b9a2dd272a0c48e5237daeab50f77c7a
URL: https://github.com/llvm/llvm-project/commit/bef27e50b9a2dd272a0c48e5237daeab50f77c7a
DIFF: https://github.com/llvm/llvm-project/commit/bef27e50b9a2dd272a0c48e5237daeab50f77c7a.diff
LOG: [NFC][InstCombine] Autogenerate a few tests being affected by upcoming patch
Added:
Modified:
llvm/test/Transforms/InstCombine/PR30597.ll
llvm/test/Transforms/InstCombine/intptr1.ll
llvm/test/Transforms/InstCombine/load-bitcast32.ll
llvm/test/Transforms/InstCombine/memset_chk-1.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/PR30597.ll b/llvm/test/Transforms/InstCombine/PR30597.ll
index c0803ed71204..ceca3961bbed 100644
--- a/llvm/test/Transforms/InstCombine/PR30597.ll
+++ b/llvm/test/Transforms/InstCombine/PR30597.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instcombine -S | FileCheck %s
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
@@ -5,6 +6,10 @@ target triple = "x86_64-unknown-linux-gnu"
; Function Attrs: readonly uwtable
define i1 @dot_ref_s(i32** noalias nocapture readonly dereferenceable(8)) {
+; CHECK-LABEL: @dot_ref_s(
+; CHECK-NEXT: entry-block:
+; CHECK-NEXT: ret i1 false
+;
entry-block:
%loadedptr = load i32*, i32** %0, align 8, !nonnull !0
%ptrtoint = ptrtoint i32* %loadedptr to i64
@@ -12,19 +17,20 @@ entry-block:
%switchtmp = icmp eq i32* %inttoptr, null
ret i1 %switchtmp
-; CHECK-LABEL: @dot_ref_s
-; CHECK-NEXT: entry-block:
-; CHECK-NEXT: ret i1 false
}
; Function Attrs: readonly uwtable
define i64* @function(i64* noalias nocapture readonly dereferenceable(8)) {
+; CHECK-LABEL: @function(
+; CHECK-NEXT: entry-block:
+; CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[TMP0:%.*]] to i64**
+; CHECK-NEXT: [[LOADED1:%.*]] = load i64*, i64** [[TMP1]], align 8, !nonnull !0
+; CHECK-NEXT: ret i64* [[LOADED1]]
+;
entry-block:
%loaded = load i64, i64* %0, align 8, !range !1
%inttoptr = inttoptr i64 %loaded to i64*
ret i64* %inttoptr
-; CHECK-LABEL: @function
-; CHECK: %{{.+}} = load i64*, i64** %{{.+}}, align 8, !nonnull
}
diff --git a/llvm/test/Transforms/InstCombine/intptr1.ll b/llvm/test/Transforms/InstCombine/intptr1.ll
index 1e00f5e06d51..3d25c9d5f5a7 100644
--- a/llvm/test/Transforms/InstCombine/intptr1.ll
+++ b/llvm/test/Transforms/InstCombine/intptr1.ll
@@ -1,36 +1,48 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instcombine -S | FileCheck %s
define void @test1(float* %a, float* readnone %a_end, i64* %b.i64) {
-; CHECK-LABEL: @test1
+; CHECK-LABEL: @test1(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ult float* [[A:%.*]], [[A_END:%.*]]
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i64* [[B_I64:%.*]] to float**
+; CHECK-NEXT: [[B1:%.*]] = load float*, float** [[TMP0]], align 8
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi float* [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT: [[B_ADDR_02_PTR:%.*]] = phi float* [ [[ADD:%.*]], [[FOR_BODY]] ], [ [[B1]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT: [[TMP1:%.*]] = load float, float* [[B_ADDR_02_PTR]], align 4
+; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[TMP1]], 4.200000e+01
+; CHECK-NEXT: store float [[MUL_I]], float* [[A_ADDR_03]], align 4
+; CHECK-NEXT: [[ADD]] = getelementptr inbounds float, float* [[B_ADDR_02_PTR]], i64 1
+; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds float, float* [[A_ADDR_03]], i64 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult float* [[INCDEC_PTR]], [[A_END]]
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%cmp1 = icmp ult float* %a, %a_end
br i1 %cmp1, label %for.body.preheader, label %for.end
for.body.preheader: ; preds = %entry
%b = load i64, i64* %b.i64, align 8
-; CHECK: load float*, float**
br label %for.body
for.body: ; preds = %for.body, %for.body.preheader
%a.addr.03 = phi float* [ %incdec.ptr, %for.body ], [ %a, %for.body.preheader ]
%b.addr.02 = phi i64 [ %add.int, %for.body ], [ %b, %for.body.preheader ]
-; CHECK: %a.addr.03 = phi float* [ %incdec.ptr, %for.body ], [ %a, %for.body.preheader ]
-; CHECK: %b.addr.02.ptr = phi float* [ %add, %for.body ],
-; CHECK-NOT: %b.addr.02 = phi i64
%tmp = inttoptr i64 %b.addr.02 to float*
-; CHECK-NOT: inttoptr i64
%tmp1 = load float, float* %tmp, align 4
-; CHECK: = load
%mul.i = fmul float %tmp1, 4.200000e+01
store float %mul.i, float* %a.addr.03, align 4
%add = getelementptr inbounds float, float* %tmp, i64 1
%add.int = ptrtoint float* %add to i64
-; CHECK: %add = getelementptr
-; CHECK-NOT: ptrtoint float*
%incdec.ptr = getelementptr inbounds float, float* %a.addr.03, i64 1
-; CHECK: %incdec.ptr =
%cmp = icmp ult float* %incdec.ptr, %a_end
br i1 %cmp, label %for.body, label %for.end
@@ -39,7 +51,31 @@ for.end: ; preds = %for.body, %entry
}
define void @test1_neg(float* %a, float* readnone %a_end, i64* %b.i64) {
-; CHECK-LABEL: @test1_neg
+; CHECK-LABEL: @test1_neg(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ult float* [[A:%.*]], [[A_END:%.*]]
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: [[B:%.*]] = load i64, i64* [[B_I64:%.*]], align 8
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi float* [ [[INCDEC_PTR:%.*]], [[BB:%.*]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT: [[B_ADDR_02:%.*]] = phi i64 [ [[ADD_INT:%.*]], [[BB]] ], [ [[B]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT: [[TMP:%.*]] = inttoptr i64 [[B_ADDR_02]] to float*
+; CHECK-NEXT: [[PTRCMP:%.*]] = icmp ult float* [[TMP]], [[A_END]]
+; CHECK-NEXT: br i1 [[PTRCMP]], label [[FOR_END]], label [[BB]]
+; CHECK: bb:
+; CHECK-NEXT: [[TMP1:%.*]] = load float, float* [[A]], align 4
+; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[TMP1]], 4.200000e+01
+; CHECK-NEXT: store float [[MUL_I]], float* [[A_ADDR_03]], align 4
+; CHECK-NEXT: [[ADD:%.*]] = getelementptr inbounds float, float* [[A]], i64 1
+; CHECK-NEXT: [[ADD_INT]] = ptrtoint float* [[ADD]] to i64
+; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds float, float* [[A_ADDR_03]], i64 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult float* [[INCDEC_PTR]], [[A_END]]
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%cmp1 = icmp ult float* %a, %a_end
br i1 %cmp1, label %for.body.preheader, label %for.end
@@ -52,11 +88,8 @@ for.body: ; preds = %for.body, %for.body
%a.addr.03 = phi float* [ %incdec.ptr, %bb ], [ %a, %for.body.preheader ]
%b.addr.02 = phi i64 [ %add.int, %bb ], [ %b, %for.body.preheader ]
-; CHECK: %a.addr.03 = phi float* [ %incdec.ptr, %bb ], [ %a, %for.body.preheader ]
-; CHECK: %b.addr.02 = phi i64
%tmp = inttoptr i64 %b.addr.02 to float*
-; CHECK: inttoptr i64
%ptrcmp = icmp ult float* %tmp, %a_end
br i1 %ptrcmp, label %for.end, label %bb
@@ -66,7 +99,6 @@ bb:
store float %mul.i, float* %a.addr.03, align 4
%add = getelementptr inbounds float, float* %a, i64 1
%add.int = ptrtoint float* %add to i64
-; CHECK: ptrtoint float*
%incdec.ptr = getelementptr inbounds float, float* %a.addr.03, i64 1
%cmp = icmp ult float* %incdec.ptr, %a_end
br i1 %cmp, label %for.body, label %for.end
@@ -77,7 +109,26 @@ for.end: ; preds = %for.body, %entry
define void @test2(float* %a, float* readnone %a_end, float** %b.float) {
-; CHECK-LABEL: @test2
+; CHECK-LABEL: @test2(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ult float* [[A:%.*]], [[A_END:%.*]]
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: [[B1:%.*]] = load float*, float** [[B_FLOAT:%.*]], align 8
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi float* [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT: [[B_ADDR_02_PTR:%.*]] = phi float* [ [[ADD:%.*]], [[FOR_BODY]] ], [ [[B1]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT: [[TMP1:%.*]] = load float, float* [[B_ADDR_02_PTR]], align 4
+; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[TMP1]], 4.200000e+01
+; CHECK-NEXT: store float [[MUL_I]], float* [[A_ADDR_03]], align 4
+; CHECK-NEXT: [[ADD]] = getelementptr inbounds float, float* [[B_ADDR_02_PTR]], i64 1
+; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds float, float* [[A_ADDR_03]], i64 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult float* [[INCDEC_PTR]], [[A_END]]
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%cmp1 = icmp ult float* %a, %a_end
br i1 %cmp1, label %for.body.preheader, label %for.end
@@ -85,29 +136,20 @@ entry:
for.body.preheader: ; preds = %entry
%b.i64 = bitcast float** %b.float to i64*
%b = load i64, i64* %b.i64, align 8
-; CHECK: load float*, float**
br label %for.body
for.body: ; preds = %for.body, %for.body.preheader
%a.addr.03 = phi float* [ %incdec.ptr, %for.body ], [ %a, %for.body.preheader ]
%b.addr.02 = phi i64 [ %add.int, %for.body ], [ %b, %for.body.preheader ]
-; CHECK: %a.addr.03 = phi float* [ %incdec.ptr, %for.body ], [ %a, %for.body.preheader ]
-; CHECK: %b.addr.02.ptr = phi float* [ %add, %for.body ],
-; CHECK-NOT: %b.addr.02 = phi i64
%tmp = inttoptr i64 %b.addr.02 to float*
-; CHECK-NOT: inttoptr i64
%tmp1 = load float, float* %tmp, align 4
-; CHECK: = load
%mul.i = fmul float %tmp1, 4.200000e+01
store float %mul.i, float* %a.addr.03, align 4
%add = getelementptr inbounds float, float* %tmp, i64 1
-; CHECK: %add =
%add.int = ptrtoint float* %add to i64
-; CHECK-NOT: ptrtoint float*
%incdec.ptr = getelementptr inbounds float, float* %a.addr.03, i64 1
-; CHECK: %incdec.ptr =
%cmp = icmp ult float* %incdec.ptr, %a_end
br i1 %cmp, label %for.body, label %for.end
@@ -117,7 +159,27 @@ for.end: ; preds = %for.body, %entry
define void @test3(float* %a, float* readnone %a_end, i8** %b.i8p) {
-; CHECK-LABEL: @test3
+; CHECK-LABEL: @test3(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ult float* [[A:%.*]], [[A_END:%.*]]
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8** [[B_I8P:%.*]] to float**
+; CHECK-NEXT: [[B1:%.*]] = load float*, float** [[TMP0]], align 8
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi float* [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT: [[B_ADDR_02_PTR:%.*]] = phi float* [ [[ADD:%.*]], [[FOR_BODY]] ], [ [[B1]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT: [[TMP1:%.*]] = load float, float* [[B_ADDR_02_PTR]], align 4
+; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[TMP1]], 4.200000e+01
+; CHECK-NEXT: store float [[MUL_I]], float* [[A_ADDR_03]], align 4
+; CHECK-NEXT: [[ADD]] = getelementptr inbounds float, float* [[B_ADDR_02_PTR]], i64 1
+; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds float, float* [[A_ADDR_03]], i64 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult float* [[INCDEC_PTR]], [[A_END]]
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
%cmp1 = icmp ult float* %a, %a_end
br i1 %cmp1, label %for.body.preheader, label %for.end
@@ -125,29 +187,20 @@ entry:
for.body.preheader: ; preds = %entry
%b.i64 = bitcast i8** %b.i8p to i64*
%b = load i64, i64* %b.i64, align 8
-; CHECK: load float*, float**
br label %for.body
for.body: ; preds = %for.body, %for.body.preheader
%a.addr.03 = phi float* [ %incdec.ptr, %for.body ], [ %a, %for.body.preheader ]
%b.addr.02 = phi i64 [ %add.int, %for.body ], [ %b, %for.body.preheader ]
-; CHECK: %a.addr.03 = phi float* [ %incdec.ptr, %for.body ], [ %a, %for.body.preheader ]
-; CHECK: %b.addr.02.ptr = phi float* [ %add, %for.body ],
-; CHECK-NOT: %b.addr.02 = phi i64
%tmp = inttoptr i64 %b.addr.02 to float*
-; CHECK-NOT: inttoptr i64
%tmp1 = load float, float* %tmp, align 4
-; CHECK: = load
%mul.i = fmul float %tmp1, 4.200000e+01
store float %mul.i, float* %a.addr.03, align 4
%add = getelementptr inbounds float, float* %tmp, i64 1
-; CHECK: %add = getelementptr
%add.int = ptrtoint float* %add to i64
-; CHECK-NOT: ptrtoint float*
%incdec.ptr = getelementptr inbounds float, float* %a.addr.03, i64 1
-; CHECK: %incdec.ptr =
%cmp = icmp ult float* %incdec.ptr, %a_end
br i1 %cmp, label %for.body, label %for.end
@@ -157,34 +210,45 @@ for.end: ; preds = %for.body, %entry
define void @test4(float* %a, float* readnone %a_end, float** %b.float) {
+; CHECK-LABEL: @test4(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ult float* [[A:%.*]], [[A_END:%.*]]
+; CHECK-NEXT: br i1 [[CMP1]], label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: [[B_F12:%.*]] = load float*, float** [[B_FLOAT:%.*]], align 8
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: [[A_ADDR_03:%.*]] = phi float* [ [[INCDEC_PTR:%.*]], [[FOR_BODY]] ], [ [[A]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT: [[B_ADDR_02_PTR:%.*]] = phi float* [ [[ADD:%.*]], [[FOR_BODY]] ], [ [[B_F12]], [[FOR_BODY_PREHEADER]] ]
+; CHECK-NEXT: [[TMP1:%.*]] = load float, float* [[B_ADDR_02_PTR]], align 4
+; CHECK-NEXT: [[MUL_I:%.*]] = fmul float [[TMP1]], 4.200000e+01
+; CHECK-NEXT: store float [[MUL_I]], float* [[A_ADDR_03]], align 4
+; CHECK-NEXT: [[ADD]] = getelementptr inbounds float, float* [[B_ADDR_02_PTR]], i64 1
+; CHECK-NEXT: [[INCDEC_PTR]] = getelementptr inbounds float, float* [[A_ADDR_03]], i64 1
+; CHECK-NEXT: [[CMP:%.*]] = icmp ult float* [[INCDEC_PTR]], [[A_END]]
+; CHECK-NEXT: br i1 [[CMP]], label [[FOR_BODY]], label [[FOR_END]]
+; CHECK: for.end:
+; CHECK-NEXT: ret void
+;
entry:
-; CHECK-LABEL: @test4
%cmp1 = icmp ult float* %a, %a_end
br i1 %cmp1, label %for.body.preheader, label %for.end
for.body.preheader: ; preds = %entry
%b.f = load float*, float** %b.float, align 8
%b = ptrtoint float* %b.f to i64
-; CHECK: load float*, float**
-; CHECK-NOT: ptrtoint float*
br label %for.body
-; CHECK: br label %for.body
for.body: ; preds = %for.body, %for.body.preheader
%a.addr.03 = phi float* [ %incdec.ptr, %for.body ], [ %a, %for.body.preheader ]
%b.addr.02 = phi i64 [ %add.int, %for.body ], [ %b, %for.body.preheader ]
%tmp = inttoptr i64 %b.addr.02 to float*
-; CHECK-NOT: inttoptr i64
%tmp1 = load float, float* %tmp, align 4
-; CHECK: = load
%mul.i = fmul float %tmp1, 4.200000e+01
store float %mul.i, float* %a.addr.03, align 4
%add = getelementptr inbounds float, float* %tmp, i64 1
-; CHECK: %add =
%add.int = ptrtoint float* %add to i64
-; CHECK-NOT: ptrtoint float*
%incdec.ptr = getelementptr inbounds float, float* %a.addr.03, i64 1
-; CHECK: %incdec.ptr =
%cmp = icmp ult float* %incdec.ptr, %a_end
br i1 %cmp, label %for.body, label %for.end
diff --git a/llvm/test/Transforms/InstCombine/load-bitcast32.ll b/llvm/test/Transforms/InstCombine/load-bitcast32.ll
index b1c78a8a314e..c9de0b96f4af 100644
--- a/llvm/test/Transforms/InstCombine/load-bitcast32.ll
+++ b/llvm/test/Transforms/InstCombine/load-bitcast32.ll
@@ -1,13 +1,19 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -instcombine -S < %s | FileCheck %s
target datalayout = "p:32:32:32"
define i64* @test1(i8* %x) {
-entry:
; CHECK-LABEL: @test1(
-; CHECK: load i64, i64*
-; CHECK: ret
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[A:%.*]] = bitcast i8* [[X:%.*]] to i64*
+; CHECK-NEXT: [[B:%.*]] = load i64, i64* [[A]], align 4
+; CHECK-NEXT: [[TMP0:%.*]] = trunc i64 [[B]] to i32
+; CHECK-NEXT: [[C:%.*]] = inttoptr i32 [[TMP0]] to i64*
+; CHECK-NEXT: ret i64* [[C]]
+;
+entry:
%a = bitcast i8* %x to i64*
%b = load i64, i64* %a
%c = inttoptr i64 %b to i64*
@@ -16,10 +22,13 @@ entry:
}
define i32* @test2(i8* %x) {
-entry:
; CHECK-LABEL: @test2(
-; CHECK: load i32*, i32**
-; CHECK: ret
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i32**
+; CHECK-NEXT: [[B1:%.*]] = load i32*, i32** [[TMP0]], align 4
+; CHECK-NEXT: ret i32* [[B1]]
+;
+entry:
%a = bitcast i8* %x to i32*
%b = load i32, i32* %a
%c = inttoptr i32 %b to i32*
@@ -28,10 +37,13 @@ entry:
}
define i64* @test3(i8* %x) {
-entry:
; CHECK-LABEL: @test3(
-; CHECK: load i64*, i64**
-; CHECK: ret
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i64**
+; CHECK-NEXT: [[B1:%.*]] = load i64*, i64** [[TMP0]], align 4
+; CHECK-NEXT: ret i64* [[B1]]
+;
+entry:
%a = bitcast i8* %x to i32*
%b = load i32, i32* %a
%c = inttoptr i32 %b to i64*
@@ -40,11 +52,14 @@ entry:
}
define i64 @test4(i8* %x) {
-entry:
; CHECK-LABEL: @test4(
-; CHECK: load i32, i32*
-; CHECK: zext
-; CHECK: ret
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i32*
+; CHECK-NEXT: [[B1:%.*]] = load i32, i32* [[TMP0]], align 4
+; CHECK-NEXT: [[C:%.*]] = zext i32 [[B1]] to i64
+; CHECK-NEXT: ret i64 [[C]]
+;
+entry:
%a = bitcast i8* %x to i64**
%b = load i64*, i64** %a
%c = ptrtoint i64* %b to i64
@@ -53,10 +68,13 @@ entry:
}
define i32 @test5(i8* %x) {
-entry:
; CHECK-LABEL: @test5(
-; CHECK: load i32, i32*
-; CHECK: ret
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i32*
+; CHECK-NEXT: [[B1:%.*]] = load i32, i32* [[TMP0]], align 4
+; CHECK-NEXT: ret i32 [[B1]]
+;
+entry:
%a = bitcast i8* %x to i32**
%b = load i32*, i32** %a
%c = ptrtoint i32* %b to i32
@@ -65,11 +83,14 @@ entry:
}
define i64 @test6(i8* %x) {
-entry:
; CHECK-LABEL: @test6(
-; CHECK: load i32, i32*
-; CHECK: zext
-; CHECK: ret
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[X:%.*]] to i32*
+; CHECK-NEXT: [[B1:%.*]] = load i32, i32* [[TMP0]], align 4
+; CHECK-NEXT: [[C:%.*]] = zext i32 [[B1]] to i64
+; CHECK-NEXT: ret i64 [[C]]
+;
+entry:
%a = bitcast i8* %x to i32**
%b = load i32*, i32** %a
%c = ptrtoint i32* %b to i64
diff --git a/llvm/test/Transforms/InstCombine/memset_chk-1.ll b/llvm/test/Transforms/InstCombine/memset_chk-1.ll
index ad45fb86299d..6068c550c4c0 100644
--- a/llvm/test/Transforms/InstCombine/memset_chk-1.ll
+++ b/llvm/test/Transforms/InstCombine/memset_chk-1.ll
@@ -78,13 +78,13 @@ define i32 @test_rauw(i8* %a, i8* %b, i8** %c) {
; CHECK-NEXT: [[YO107:%.*]] = call i64 @llvm.objectsize.i64.p0i8(i8* [[B:%.*]], i1 false, i1 false, i1 false)
; CHECK-NEXT: [[CALL50:%.*]] = call i8* @__memmove_chk(i8* [[B]], i8* [[A]], i64 [[ADD180]], i64 [[YO107]])
; CHECK-NEXT: [[STRLEN:%.*]] = call i64 @strlen(i8* nonnull dereferenceable(1) [[B]])
-; CHECK-NEXT: [[STRCHR2:%.*]] = getelementptr i8, i8* [[B]], i64 [[STRLEN]]
+; CHECK-NEXT: [[STRCHR1:%.*]] = getelementptr i8, i8* [[B]], i64 [[STRLEN]]
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8** [[C:%.*]] to i64*
-; CHECK-NEXT: [[D1:%.*]] = load i64, i64* [[TMP0]], align 8
+; CHECK-NEXT: [[D2:%.*]] = load i64, i64* [[TMP0]], align 8
; CHECK-NEXT: [[SUB183:%.*]] = ptrtoint i8* [[B]] to i64
-; CHECK-NEXT: [[SUB184:%.*]] = sub i64 [[D1]], [[SUB183]]
+; CHECK-NEXT: [[SUB184:%.*]] = sub i64 [[D2]], [[SUB183]]
; CHECK-NEXT: [[ADD52_I_I:%.*]] = add nsw i64 [[SUB184]], 1
-; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[STRCHR2]], i8 0, i64 [[ADD52_I_I]], i1 false)
+; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 1 [[STRCHR1]], i8 0, i64 [[ADD52_I_I]], i1 false)
; CHECK-NEXT: ret i32 4
;
entry:
@@ -114,13 +114,13 @@ declare i8* @__memset_chk(i8*, i32, i64, i64)
define float* @pr25892(i64 %size) #0 {
; CHECK-LABEL: @pr25892(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CALL:%.*]] = tail call i8* @malloc(i64 [[SIZE:%.*]]) #3
+; CHECK-NEXT: [[CALL:%.*]] = tail call i8* @malloc(i64 [[SIZE:%.*]]) [[ATTR3:#.*]]
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8* [[CALL]], null
; CHECK-NEXT: br i1 [[CMP]], label [[CLEANUP:%.*]], label [[IF_END:%.*]]
; CHECK: if.end:
; CHECK-NEXT: [[BC:%.*]] = bitcast i8* [[CALL]] to float*
; CHECK-NEXT: [[CALL2:%.*]] = tail call i64 @llvm.objectsize.i64.p0i8(i8* nonnull [[CALL]], i1 false, i1 false, i1 false)
-; CHECK-NEXT: [[CALL3:%.*]] = tail call i8* @__memset_chk(i8* nonnull [[CALL]], i32 0, i64 [[SIZE]], i64 [[CALL2]]) #3
+; CHECK-NEXT: [[CALL3:%.*]] = tail call i8* @__memset_chk(i8* nonnull [[CALL]], i32 0, i64 [[SIZE]], i64 [[CALL2]]) [[ATTR3]]
; CHECK-NEXT: br label [[CLEANUP]]
; CHECK: cleanup:
; CHECK-NEXT: [[RETVAL_0:%.*]] = phi float* [ [[BC]], [[IF_END]] ], [ null, [[ENTRY:%.*]] ]
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