[PATCH] D88767: Show register names in DWARF unwind info.

[James Nagurne via Phabricator via llvm-commits]

JamesNagurne added a comment.

In llvm/test/DebugInfo/dwarfdump-debug-frame-simple.test

Our team maintains a downstream ARM target. The compiler, and indeed llvm-dwarfdump, are not built with the target used to build the object file queried here. Therefore, it does not know to use ESP or EIP and dumps reg4/reg8 instead.
Has any other downstream compiler seen this? I'm not able to access the buildbots right at the moment.

Specifically, here's the output from our lit test run with this change integrated into our downstream build:

  llvm/test/DebugInfo/Inputs/dwarfdump-test-32bit.elf.o: No available targets are compatible with triple "i386-unknown-unknown"
  llvm/test/DebugInfo/Inputs/dwarfdump-test-32bit.elf.o:	file format elf32-i386
  
  .debug_frame contents:
  
  00000000 00000010 ffffffff CIE
    Format:                DWARF32
    Version:               1
    Augmentation:          ""
    Code alignment factor: 1
    Data alignment factor: -4
    Return address column: 8
  
    DW_CFA_def_cfa: reg4 +4
    DW_CFA_offset: reg8 -4
    DW_CFA_nop:
    DW_CFA_nop:


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D88767/new/

https://reviews.llvm.org/D88767