[PATCH] D88742: [AArch64] Identify SAD pattern for v16i8 type

Tue Oct 6 09:17:18 PDT 2020

dmgreen added a comment.

In D88742#2314350 <https://reviews.llvm.org/D88742#2314350>, @mivnay wrote:

> In D88742#2312075 <https://reviews.llvm.org/D88742#2312075>, @dmgreen wrote:
>
>> So this converts `v16i32 abs(sub(zext(v16i8), zext(v16i8))))` to `v16i32 zext(abd(v16i8, v16i8))`? And doesn't start with a trunk? That sounds like it should work OK.
>
> Yes.
>
>> Can you add other types and sign extends? And more tests. And a AArch64ISD node (they are not very complex to add :) )
>
> Few patterns already exists in .td files for uabdl, etc. I tried to add the ISD node for UABD  (posted it in https://reviews.llvm.org/D88897) but there are unintended consequences (ISel is generating different patterns). Can I take a look at it later (when other pending patches are done)? About the sign extend variants, I am not sure whether it is legal to do this transformation.

What part of sadb are you worried about? I thought they could be treated the same, given you are extended from enough extra bits. But I may be mistaken, they can be somewhat difficult.

Can D88897 <https://reviews.llvm.org/D88897> be folder back into here now?

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