[llvm] 53fc426 - [InstCombine] Add tests for or(shl(x, c1), lshr(y, c2)) patterns that could fold to funnel shifts
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sat Oct 3 10:34:53 PDT 2020
Author: Simon Pilgrim
Date: 2020-10-03T18:32:47+01:00
New Revision: 53fc426088d7e48272bfc37a3881a7a6fe405940
URL: https://github.com/llvm/llvm-project/commit/53fc426088d7e48272bfc37a3881a7a6fe405940
DIFF: https://github.com/llvm/llvm-project/commit/53fc426088d7e48272bfc37a3881a7a6fe405940.diff
LOG: [InstCombine] Add tests for or(shl(x,c1),lshr(y,c2)) patterns that could fold to funnel shifts
Some initial test coverage toward fixing PR46896 - these are just copied from rotate.ll
Added:
llvm/test/Transforms/InstCombine/funnel.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/funnel.ll b/llvm/test/Transforms/InstCombine/funnel.ll
new file mode 100644
index 000000000000..9adb91b88d7f
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/funnel.ll
@@ -0,0 +1,184 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
+
+; TODO: Canonicalize or(shl,lshr) by constant to funnel shift intrinsics.
+; This should help cost modeling for vectorization, inlining, etc.
+; If a target does not have a fshl instruction, the expansion will
+; be exactly these same 3 basic ops (shl/lshr/or).
+
+define i32 @fshl_i32_constant(i32 %x, i32 %y) {
+; CHECK-LABEL: @fshl_i32_constant(
+; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[X:%.*]], 11
+; CHECK-NEXT: [[SHR:%.*]] = lshr i32 [[Y:%.*]], 21
+; CHECK-NEXT: [[R:%.*]] = or i32 [[SHR]], [[SHL]]
+; CHECK-NEXT: ret i32 [[R]]
+;
+ %shl = shl i32 %x, 11
+ %shr = lshr i32 %y, 21
+ %r = or i32 %shr, %shl
+ ret i32 %r
+}
+
+define i42 @fshr_i42_constant(i42 %x, i42 %y) {
+; CHECK-LABEL: @fshr_i42_constant(
+; CHECK-NEXT: [[SHL:%.*]] = shl i42 [[X:%.*]], 31
+; CHECK-NEXT: [[SHR:%.*]] = lshr i42 [[Y:%.*]], 11
+; CHECK-NEXT: [[R:%.*]] = or i42 [[SHR]], [[SHL]]
+; CHECK-NEXT: ret i42 [[R]]
+;
+ %shl = shl i42 %x, 31
+ %shr = lshr i42 %y, 11
+ %r = or i42 %shr, %shl
+ ret i42 %r
+}
+
+; TODO: Vector types are allowed.
+
+define <2 x i16> @fshl_v2i16_constant_splat(<2 x i16> %x, <2 x i16> %y) {
+; CHECK-LABEL: @fshl_v2i16_constant_splat(
+; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i16> [[X:%.*]], <i16 1, i16 1>
+; CHECK-NEXT: [[SHR:%.*]] = lshr <2 x i16> [[Y:%.*]], <i16 15, i16 15>
+; CHECK-NEXT: [[R:%.*]] = or <2 x i16> [[SHL]], [[SHR]]
+; CHECK-NEXT: ret <2 x i16> [[R]]
+;
+ %shl = shl <2 x i16> %x, <i16 1, i16 1>
+ %shr = lshr <2 x i16> %y, <i16 15, i16 15>
+ %r = or <2 x i16> %shl, %shr
+ ret <2 x i16> %r
+}
+
+define <2 x i16> @fshl_v2i16_constant_splat_undef0(<2 x i16> %x, <2 x i16> %y) {
+; CHECK-LABEL: @fshl_v2i16_constant_splat_undef0(
+; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i16> [[X:%.*]], <i16 undef, i16 1>
+; CHECK-NEXT: [[SHR:%.*]] = lshr <2 x i16> [[Y:%.*]], <i16 15, i16 15>
+; CHECK-NEXT: [[R:%.*]] = or <2 x i16> [[SHL]], [[SHR]]
+; CHECK-NEXT: ret <2 x i16> [[R]]
+;
+ %shl = shl <2 x i16> %x, <i16 undef, i16 1>
+ %shr = lshr <2 x i16> %y, <i16 15, i16 15>
+ %r = or <2 x i16> %shl, %shr
+ ret <2 x i16> %r
+}
+
+define <2 x i16> @fshl_v2i16_constant_splat_undef1(<2 x i16> %x, <2 x i16> %y) {
+; CHECK-LABEL: @fshl_v2i16_constant_splat_undef1(
+; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i16> [[X:%.*]], <i16 1, i16 1>
+; CHECK-NEXT: [[SHR:%.*]] = lshr <2 x i16> [[Y:%.*]], <i16 15, i16 undef>
+; CHECK-NEXT: [[R:%.*]] = or <2 x i16> [[SHL]], [[SHR]]
+; CHECK-NEXT: ret <2 x i16> [[R]]
+;
+ %shl = shl <2 x i16> %x, <i16 1, i16 1>
+ %shr = lshr <2 x i16> %y, <i16 15, i16 undef>
+ %r = or <2 x i16> %shl, %shr
+ ret <2 x i16> %r
+}
+
+; TODO: Non-power-of-2 vector types are allowed.
+
+define <2 x i17> @fshr_v2i17_constant_splat(<2 x i17> %x, <2 x i17> %y) {
+; CHECK-LABEL: @fshr_v2i17_constant_splat(
+; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i17> [[X:%.*]], <i17 12, i17 12>
+; CHECK-NEXT: [[SHR:%.*]] = lshr <2 x i17> [[Y:%.*]], <i17 5, i17 5>
+; CHECK-NEXT: [[R:%.*]] = or <2 x i17> [[SHR]], [[SHL]]
+; CHECK-NEXT: ret <2 x i17> [[R]]
+;
+ %shl = shl <2 x i17> %x, <i17 12, i17 12>
+ %shr = lshr <2 x i17> %y, <i17 5, i17 5>
+ %r = or <2 x i17> %shr, %shl
+ ret <2 x i17> %r
+}
+
+define <2 x i17> @fshr_v2i17_constant_splat_undef0(<2 x i17> %x, <2 x i17> %y) {
+; CHECK-LABEL: @fshr_v2i17_constant_splat_undef0(
+; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i17> [[X:%.*]], <i17 12, i17 undef>
+; CHECK-NEXT: [[SHR:%.*]] = lshr <2 x i17> [[Y:%.*]], <i17 undef, i17 5>
+; CHECK-NEXT: [[R:%.*]] = or <2 x i17> [[SHR]], [[SHL]]
+; CHECK-NEXT: ret <2 x i17> [[R]]
+;
+ %shl = shl <2 x i17> %x, <i17 12, i17 undef>
+ %shr = lshr <2 x i17> %y, <i17 undef, i17 5>
+ %r = or <2 x i17> %shr, %shl
+ ret <2 x i17> %r
+}
+
+define <2 x i17> @fshr_v2i17_constant_splat_undef1(<2 x i17> %x, <2 x i17> %y) {
+; CHECK-LABEL: @fshr_v2i17_constant_splat_undef1(
+; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i17> [[X:%.*]], <i17 12, i17 undef>
+; CHECK-NEXT: [[SHR:%.*]] = lshr <2 x i17> [[Y:%.*]], <i17 5, i17 undef>
+; CHECK-NEXT: [[R:%.*]] = or <2 x i17> [[SHR]], [[SHL]]
+; CHECK-NEXT: ret <2 x i17> [[R]]
+;
+ %shl = shl <2 x i17> %x, <i17 12, i17 undef>
+ %shr = lshr <2 x i17> %y, <i17 5, i17 undef>
+ %r = or <2 x i17> %shr, %shl
+ ret <2 x i17> %r
+}
+
+; TODO: Allow arbitrary shift constants.
+
+define <2 x i32> @fshr_v2i32_constant_nonsplat(<2 x i32> %x, <2 x i32> %y) {
+; CHECK-LABEL: @fshr_v2i32_constant_nonsplat(
+; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i32> [[X:%.*]], <i32 17, i32 19>
+; CHECK-NEXT: [[SHR:%.*]] = lshr <2 x i32> [[Y:%.*]], <i32 15, i32 13>
+; CHECK-NEXT: [[R:%.*]] = or <2 x i32> [[SHL]], [[SHR]]
+; CHECK-NEXT: ret <2 x i32> [[R]]
+;
+ %shl = shl <2 x i32> %x, <i32 17, i32 19>
+ %shr = lshr <2 x i32> %y, <i32 15, i32 13>
+ %r = or <2 x i32> %shl, %shr
+ ret <2 x i32> %r
+}
+
+define <2 x i32> @fshr_v2i32_constant_nonsplat_undef0(<2 x i32> %x, <2 x i32> %y) {
+; CHECK-LABEL: @fshr_v2i32_constant_nonsplat_undef0(
+; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i32> [[X:%.*]], <i32 undef, i32 19>
+; CHECK-NEXT: [[SHR:%.*]] = lshr <2 x i32> [[Y:%.*]], <i32 15, i32 13>
+; CHECK-NEXT: [[R:%.*]] = or <2 x i32> [[SHL]], [[SHR]]
+; CHECK-NEXT: ret <2 x i32> [[R]]
+;
+ %shl = shl <2 x i32> %x, <i32 undef, i32 19>
+ %shr = lshr <2 x i32> %y, <i32 15, i32 13>
+ %r = or <2 x i32> %shl, %shr
+ ret <2 x i32> %r
+}
+
+define <2 x i32> @fshr_v2i32_constant_nonsplat_undef1(<2 x i32> %x, <2 x i32> %y) {
+; CHECK-LABEL: @fshr_v2i32_constant_nonsplat_undef1(
+; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i32> [[X:%.*]], <i32 17, i32 19>
+; CHECK-NEXT: [[SHR:%.*]] = lshr <2 x i32> [[Y:%.*]], <i32 15, i32 undef>
+; CHECK-NEXT: [[R:%.*]] = or <2 x i32> [[SHL]], [[SHR]]
+; CHECK-NEXT: ret <2 x i32> [[R]]
+;
+ %shl = shl <2 x i32> %x, <i32 17, i32 19>
+ %shr = lshr <2 x i32> %y, <i32 15, i32 undef>
+ %r = or <2 x i32> %shl, %shr
+ ret <2 x i32> %r
+}
+
+define <2 x i36> @fshl_v2i36_constant_nonsplat(<2 x i36> %x, <2 x i36> %y) {
+; CHECK-LABEL: @fshl_v2i36_constant_nonsplat(
+; CHECK-NEXT: [[SHL:%.*]] = shl <2 x i36> [[X:%.*]], <i36 21, i36 11>
+; CHECK-NEXT: [[SHR:%.*]] = lshr <2 x i36> [[Y:%.*]], <i36 15, i36 25>
+; CHECK-NEXT: [[R:%.*]] = or <2 x i36> [[SHL]], [[SHR]]
+; CHECK-NEXT: ret <2 x i36> [[R]]
+;
+ %shl = shl <2 x i36> %x, <i36 21, i36 11>
+ %shr = lshr <2 x i36> %y, <i36 15, i36 25>
+ %r = or <2 x i36> %shl, %shr
+ ret <2 x i36> %r
+}
+
+define <3 x i36> @fshl_v3i36_constant_nonsplat_undef0(<3 x i36> %x, <3 x i36> %y) {
+; CHECK-LABEL: @fshl_v3i36_constant_nonsplat_undef0(
+; CHECK-NEXT: [[SHL:%.*]] = shl <3 x i36> [[X:%.*]], <i36 21, i36 11, i36 undef>
+; CHECK-NEXT: [[SHR:%.*]] = lshr <3 x i36> [[Y:%.*]], <i36 15, i36 25, i36 undef>
+; CHECK-NEXT: [[R:%.*]] = or <3 x i36> [[SHL]], [[SHR]]
+; CHECK-NEXT: ret <3 x i36> [[R]]
+;
+ %shl = shl <3 x i36> %x, <i36 21, i36 11, i36 undef>
+ %shr = lshr <3 x i36> %y, <i36 15, i36 25, i36 undef>
+ %r = or <3 x i36> %shl, %shr
+ ret <3 x i36> %r
+}
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