[PATCH] D88642: [AArch64] Match the windows canonical callee saved register order [alternative implementation]

Martin Storsjö via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Oct 1 02:10:02 PDT 2020


mstorsjo created this revision.
mstorsjo added reviewers: efriedma, rnk, ssijaric, TomTan.
Herald added subscribers: danielkiss, hiraditya, kristof.beyls.
Herald added a project: LLVM.
mstorsjo requested review of this revision.

On windows, the callee saved registers in a canonical prologue are ordered starting from a lower register number at a lower stack address (with the possible gap for aligning the stack at the top); this is the opposite order that llvm normally produces.

To achieve this, make computeCalleeSaveRegisterPairs lay registers out in the reverse direction, bottom up.

This keeps the logic mostly straightforward compared to before, but gives some amount of mismatch between the stack objects generated by PrologEpilogInserter, which are laid out from top to bottom in the original register order.

This is an alternative to D88543 <https://reviews.llvm.org/D88543>.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D88642

Files:
  llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
  llvm/test/CodeGen/AArch64/seh-finally.ll
  llvm/test/CodeGen/AArch64/sponentry.ll
  llvm/test/CodeGen/AArch64/win64_vararg.ll
  llvm/test/CodeGen/AArch64/wineh-frame-scavenge.mir
  llvm/test/CodeGen/AArch64/wineh-frame0.mir
  llvm/test/CodeGen/AArch64/wineh-frame1.mir
  llvm/test/CodeGen/AArch64/wineh-frame2.mir
  llvm/test/CodeGen/AArch64/wineh-frame3.mir
  llvm/test/CodeGen/AArch64/wineh-frame4.mir
  llvm/test/CodeGen/AArch64/wineh-frame5.mir
  llvm/test/CodeGen/AArch64/wineh-try-catch-realign.ll
  llvm/test/CodeGen/AArch64/wineh-try-catch.ll
  llvm/test/CodeGen/AArch64/wineh_shrinkwrap.mir

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