[PATCH] D87154: [WIP][Statepoints] Change statepoint machine instr format to better suit VReg lowering.

[Denis Antrushin via Phabricator via llvm-commits]

dantrushin marked 6 inline comments as done.
dantrushin added inline comments.


================
Comment at: llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp:611
 
-  for (unsigned i = 0; i < SI.Bases.size(); ++i) {
-    SDValue SDV = Builder.getValue(SI.Bases[i]);
-    if (AlwaysSpillBase || !LowerAsVReg.count(SDV))
-      reservePreviousStackSlotForValue(SI.Bases[i], Builder);
-    SDV = Builder.getValue(SI.Ptrs[i]);
+  for (const Value *V : SI.Ptrs) {
+    SDValue SDV = Builder.getValue(V);
----------------
skatkov wrote:
> why not to iterate over LoweredGCPtrs?
Because `reservePreviousStackSlotForValue` takes IR Value, not SDValue


================
Comment at: llvm/lib/CodeGen/StackMaps.cpp:423
+    if (NumGCPointers) {
+      // Map logical index of GC ptr to MI operand index.
+      SmallVector<unsigned, 8> GCPtrIndices;
----------------
skatkov wrote:
> separate to utility function?
I tried, but it looked ugly, because it needs to pass too much context back and forth. So I left it as is


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87154/new/

https://reviews.llvm.org/D87154