[PATCH] D88274: [PowerPC] Put the CR field in low bits of GRC during copying CRRC to GRC.

[EsmeYi via Phabricator via llvm-commits]

Esme added a comment.

In D88274#2300438 <https://reviews.llvm.org/D88274#2300438>, @nemanjai wrote:

> LGTM. The code here is correct, but I do have a couple of questions:
>
> 1. Do these copies come up in real code? And if so, under which circumstances. We don't have copies in the other direction implemented, so that makes me wonder when these ever come up.
> 2. Does this solve a problem seen in real code? If so, is there a bugzilla report? At the very least, the conditions under which this causes a problem should be added to the description.
> 3. Is there any follow up required/planned for this?

Thanks for your comments!
Sorry that I forgot to mention the real scenarios where the problem occurred. 
The problem came up when adding builtins for `xvtdivdp, xvtdivsp, xvtsqrtdp, xvtsqrtsp`, as posted in D88278 <https://reviews.llvm.org/D88278>.
Outputs of these instructions will not be placed into a fixed CR# register, so I can't directly add a rotation instruction in the .td patterns, but need to wait until the CR register is determined.
So D88278 <https://reviews.llvm.org/D88278> has to depend on this patch.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D88274/new/

https://reviews.llvm.org/D88274