[llvm] a4b1fde - [X86] Add known bits test for PEXT. NFC

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 28 23:17:12 PDT 2020


Author: Craig Topper
Date: 2020-09-28T22:54:07-07:00
New Revision: a4b1fdec9172cdb40b583884efb2971ee3b7e991

URL: https://github.com/llvm/llvm-project/commit/a4b1fdec9172cdb40b583884efb2971ee3b7e991
DIFF: https://github.com/llvm/llvm-project/commit/a4b1fdec9172cdb40b583884efb2971ee3b7e991.diff

LOG: [X86] Add known bits test for PEXT. NFC

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/bmi2-x86_64.ll
    llvm/test/CodeGen/X86/bmi2.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/bmi2-x86_64.ll b/llvm/test/CodeGen/X86/bmi2-x86_64.ll
index 22f0a5da9ce2..178ca2fcd975 100644
--- a/llvm/test/CodeGen/X86/bmi2-x86_64.ll
+++ b/llvm/test/CodeGen/X86/bmi2-x86_64.ll
@@ -74,6 +74,18 @@ define i64 @pext64_load(i64 %x, i64* %y)   {
   ret i64 %tmp
 }
 
+define i64 @pext64_knownbits(i64 %x, i64 %y)   {
+; CHECK-LABEL: pext64_knownbits:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movabsq $6148914691236517205, %rax # imm = 0x5555555555555555
+; CHECK-NEXT:    pextq %rax, %rdi, %rax
+; CHECK-NEXT:    movl %eax, %eax
+; CHECK-NEXT:    retq
+  %tmp = tail call i64 @llvm.x86.bmi.pext.64(i64 %x, i64 6148914691236517205)
+  %tmp2 = and i64 %tmp, 4294967295
+  ret i64 %tmp2
+}
+
 declare i64 @llvm.x86.bmi.pext.64(i64, i64)
 
 define i64 @mulx64(i64 %x, i64 %y, i64* %p)   {

diff  --git a/llvm/test/CodeGen/X86/bmi2.ll b/llvm/test/CodeGen/X86/bmi2.ll
index b7a8f2e79fda..4cd403f3c2ac 100644
--- a/llvm/test/CodeGen/X86/bmi2.ll
+++ b/llvm/test/CodeGen/X86/bmi2.ll
@@ -252,6 +252,26 @@ define i32 @pext32_load(i32 %x, i32* %y)   {
   ret i32 %tmp
 }
 
+define i32 @pext32_knownbits(i32 %x)   {
+; X86-LABEL: pext32_knownbits:
+; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT:    movl $1431655765, %ecx # imm = 0x55555555
+; X86-NEXT:    pextl %ecx, %eax, %eax
+; X86-NEXT:    movzwl %ax, %eax
+; X86-NEXT:    retl
+;
+; X64-LABEL: pext32_knownbits:
+; X64:       # %bb.0:
+; X64-NEXT:    movl $1431655765, %eax # imm = 0x55555555
+; X64-NEXT:    pextl %eax, %edi, %eax
+; X64-NEXT:    movzwl %ax, %eax
+; X64-NEXT:    retq
+  %tmp = tail call i32 @llvm.x86.bmi.pext.32(i32 %x, i32 1431655765)
+  %tmp2 = and i32 %tmp, 65535
+  ret i32 %tmp2
+}
+
 declare i32 @llvm.x86.bmi.pext.32(i32, i32)
 
 define i32 @mulx32(i32 %x, i32 %y, i32* %p)   {


        


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