[PATCH] D88444: [SVE] Lower fixed length VECREDUCE_[FMAX|FMIN] to Scalable

[Cameron McInally via Phabricator via llvm-commits]

cameron.mcinally created this revision.
cameron.mcinally added reviewers: paulwalker-arm, efriedma, dancgr, kmclaughlin.
Herald added subscribers: llvm-commits, psnobl, hiraditya, tschuett.
Herald added a reviewer: rengolin.
Herald added a project: LLVM.
cameron.mcinally requested review of this revision.

This patch is pretty similar to the fixed length integer reductions, with some notes:

1. The OverrideNEON flag isn't so straight forward now. But I don't see a cleaner solution. Any thoughts on this?

2. There's no vector of f16 NEON instructions, so use SVE for them.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D88444

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/sve-fixed-length-fp-reduce.ll

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