[llvm] 8524476 - [InstCombine] Add bswap tests from funnel shift intrinsics

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2020-09-25T12:40:23+01:00
New Revision: 852447650c75de5f3e9c53a2659589cd2fd36b4d

URL: https://github.com/llvm/llvm-project/commit/852447650c75de5f3e9c53a2659589cd2fd36b4d
DIFF: https://github.com/llvm/llvm-project/commit/852447650c75de5f3e9c53a2659589cd2fd36b4d.diff

LOG: [InstCombine] Add bswap tests from funnel shift intrinsics

Based on (WIP) patch in D87452 - I'm intending to add the intrinsics handling to collectBitParts as a separate patch to make the changes clearer.

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/bswap.ll

Removed: 
    


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diff  --git a/llvm/test/Transforms/InstCombine/bswap.ll b/llvm/test/Transforms/InstCombine/bswap.ll
index 540b1752c266..5ef77d9248e6 100644
--- a/llvm/test/Transforms/InstCombine/bswap.ll
+++ b/llvm/test/Transforms/InstCombine/bswap.ll
@@ -307,3 +307,44 @@ define i32 @shuf_2bytes_widening(<2 x i8> %x) {
   %cast = bitcast <4 x i8> %bswap to i32
   ret i32 %cast
 }
+
+declare i32 @llvm.fshl.i32(i32, i32, i32)
+declare i32 @llvm.fshr.i32(i32, i32, i32)
+
+define i32 @funnel_unary(i32 %abcd) {
+; CHECK-LABEL: @funnel_unary(
+; CHECK-NEXT:    [[DABC:%.*]] = call i32 @llvm.fshl.i32(i32 [[ABCD:%.*]], i32 [[ABCD]], i32 24)
+; CHECK-NEXT:    [[BCDA:%.*]] = call i32 @llvm.fshl.i32(i32 [[ABCD]], i32 [[ABCD]], i32 8)
+; CHECK-NEXT:    [[DZBZ:%.*]] = and i32 [[DABC]], -16711936
+; CHECK-NEXT:    [[ZCZA:%.*]] = and i32 [[BCDA]], 16711935
+; CHECK-NEXT:    [[DCBA:%.*]] = or i32 [[DZBZ]], [[ZCZA]]
+; CHECK-NEXT:    ret i32 [[DCBA]]
+;
+  %dabc = call i32 @llvm.fshl.i32(i32 %abcd, i32 %abcd, i32 24)
+  %bcda = call i32 @llvm.fshr.i32(i32 %abcd, i32 %abcd, i32 24)
+  %dzbz = and i32 %dabc, -16711936
+  %zcza = and i32 %bcda,  16711935
+  %dcba = or i32 %dzbz, %zcza
+  ret i32 %dcba
+}
+
+define i32 @funnel_binary(i32 %abcd) {
+; CHECK-LABEL: @funnel_binary(
+; CHECK-NEXT:    [[CDZZ:%.*]] = shl i32 [[ABCD:%.*]], 16
+; CHECK-NEXT:    [[DCDZ:%.*]] = call i32 @llvm.fshl.i32(i32 [[ABCD]], i32 [[CDZZ]], i32 24)
+; CHECK-NEXT:    [[ZZAB:%.*]] = lshr i32 [[ABCD]], 16
+; CHECK-NEXT:    [[ZABA:%.*]] = call i32 @llvm.fshl.i32(i32 [[ZZAB]], i32 [[ABCD]], i32 8)
+; CHECK-NEXT:    [[DCZZ:%.*]] = and i32 [[DCDZ]], -65536
+; CHECK-NEXT:    [[ZZBA:%.*]] = and i32 [[ZABA]], 65535
+; CHECK-NEXT:    [[DCBA:%.*]] = or i32 [[DCZZ]], [[ZZBA]]
+; CHECK-NEXT:    ret i32 [[DCBA]]
+;
+  %cdzz = shl i32 %abcd, 16
+  %dcdz = call i32 @llvm.fshl.i32(i32 %abcd, i32 %cdzz, i32 24)
+  %zzab = lshr i32 %abcd, 16
+  %zaba = call i32 @llvm.fshr.i32(i32 %zzab, i32 %abcd, i32 24)
+  %dczz = and i32 %dcdz, -65536
+  %zzba = and i32 %zaba,  65535
+  %dcba = or i32 %dczz, %zzba
+  ret i32 %dcba
+}