[llvm] 4380436 - [AMDGPU] Fixes typo in the test. NFC.

[Stanislav Mekhanoshin via llvm-commits]

Author: Stanislav Mekhanoshin
Date: 2020-09-24T16:07:15-07:00
New Revision: 43804364e2bc2bd586740dbb0b7aae2137c130cc

URL: https://github.com/llvm/llvm-project/commit/43804364e2bc2bd586740dbb0b7aae2137c130cc
DIFF: https://github.com/llvm/llvm-project/commit/43804364e2bc2bd586740dbb0b7aae2137c130cc.diff

LOG: [AMDGPU] Fixes typo in the test. NFC.

denormal-fp-math-fp32 -> denormal-fp-math-f32

Added: 
    

Modified: 
    llvm/test/CodeGen/AMDGPU/global-atomics-fp.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/AMDGPU/global-atomics-fp.ll b/llvm/test/CodeGen/AMDGPU/global-atomics-fp.ll
index a54116a79fbe..b4199cb1292a 100644
--- a/llvm/test/CodeGen/AMDGPU/global-atomics-fp.ll
+++ b/llvm/test/CodeGen/AMDGPU/global-atomics-fp.ll
@@ -7,6 +7,10 @@
 ; CAS: global_atomic_cmpswap
 ; CAS: s_andn2_b64 exec, exec,
 ; CAS-NEXT: s_cbranch_execnz [[LOOP]]
+
+; GFX90A-NOT: v_add_f32
+; GFX90A: global_atomic_add_f32 v{{[0-9]+}}, v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}}, off glc
+; GFX90A-NOT: s_cbranch_execnz
 define amdgpu_kernel void @global_atomic_fadd_ret_f32(float addrspace(1)* %ptr) #0 {
   %result = atomicrmw fadd float addrspace(1)* %ptr, float 4.0 seq_cst
   store float %result, float addrspace(1)* undef
@@ -14,11 +18,11 @@ define amdgpu_kernel void @global_atomic_fadd_ret_f32(float addrspace(1)* %ptr)
 }
 
 ; GCN-LABEL: {{^}}global_atomic_fadd_ret_f32_ieee:
-; CAS: [[LOOP:BB[0-9]+_[0-9]+]]
-; CAS: v_add_f32_e32
-; CAS: global_atomic_cmpswap
-; CAS: s_andn2_b64 exec, exec,
-; CAS-NEXT: s_cbranch_execnz [[LOOP]]
+; GCN: [[LOOP:BB[0-9]+_[0-9]+]]
+; GCN: v_add_f32_e32
+; GCN: global_atomic_cmpswap
+; GCN: s_andn2_b64 exec, exec,
+; GCN-NEXT: s_cbranch_execnz [[LOOP]]
 define amdgpu_kernel void @global_atomic_fadd_ret_f32_ieee(float addrspace(1)* %ptr) {
   %result = atomicrmw fadd float addrspace(1)* %ptr, float 4.0 seq_cst
   store float %result, float addrspace(1)* undef
@@ -26,11 +30,15 @@ define amdgpu_kernel void @global_atomic_fadd_ret_f32_ieee(float addrspace(1)* %
 }
 
 ; GCN-LABEL: {{^}}global_atomic_fadd_noret_f32:
-; GCN: [[LOOP:BB[0-9]+_[0-9]+]]
-; GCN: v_add_f32_e32
-; GCN: global_atomic_cmpswap
-; GCN: s_andn2_b64 exec, exec,
-; GCN-NEXT: s_cbranch_execnz [[LOOP]]
+; GFX900: [[LOOP:BB[0-9]+_[0-9]+]]
+; GFX900: v_add_f32_e32
+; GFX900: global_atomic_cmpswap
+; GFX900: s_andn2_b64 exec, exec,
+; GFX900-NEXT: s_cbranch_execnz [[LOOP]]
+
+; GFX908-NOT: v_add_f32
+; GFX908:     global_atomic_add_f32 v{{\[[0-9]+:[0-9]+\]}}, v{{[0-9]+}}, off
+; GFX908-NOT: s_cbranch_execnz
 define amdgpu_kernel void @global_atomic_fadd_noret_f32(float addrspace(1)* %ptr) #0 {
   %result = atomicrmw fadd float addrspace(1)* %ptr, float 4.0 seq_cst
   ret void
@@ -57,5 +65,5 @@ define amdgpu_kernel void @global_atomic_fadd_noret_f32_wrong_subtarget(float ad
   ret void
 }
 
-attributes #0 = { "denormal-fp-math-fp32"="preserve-sign,preserve-sign"}
-attributes #1 = { "denormal-fp-math-fp32"="preserve-sign,preserve-sign" "target-cpu"="gfx803" "target-features"="+atomic-fadd-insts" }
+attributes #0 = { "denormal-fp-math-f32"="preserve-sign,preserve-sign"}
+attributes #1 = { "denormal-fp-math-f32"="preserve-sign,preserve-sign" "target-cpu"="gfx803" "target-features"="+atomic-fadd-insts" }