[PATCH] D82258: [RegisterCoalescer] Fix IMPLICIT_DEF init removal for a register on joining

[Valery Pykhtin via Phabricator via llvm-commits]

vpykhtin added a comment.

Sorry, I had to explain the context around the modified code.

The IMPLICIT_DEF is //erased// only if there some "incoming" value from "other reg".

  JoinVals::ConflictResolution
  JoinVals::analyzeValue(unsigned ValNo, JoinVals &Other) {
  ...
  Line 2612:
    // Find the value in Other that overlaps VNI->def, if any.
    LiveQueryResult OtherLRQ = Other.LR.Query(VNI->def);
  ...
  
  Line 2648:
    // No simultaneous def. Is Other live at the def?
    V.OtherVNI = OtherLRQ.valueIn();
    if (!V.OtherVNI)
      // No overlap, no conflict.
      return CR_Keep;

Upon dealing with IMPLICIT_DEF this code checks if there was any other value from the joining counterpart, and if there isn't - we just keep the IMPLICIT_DEF.

In this case we have (%1 is about to be joined with %0.sub0):

  112B	bb.2:
  	; predecessors: %bb.0
  	  successors: %bb.3(0x80000000); %bb.3(100.00%)
  
  128B	  %1:sgpr_32 = IMPLICIT_DEF
  144B	  undef %0.sub0:sgpr_64 = IMPLICIT_DEF
  160B	  %0.sub1:sgpr_64 = IMPLICIT_DEF
  
  RHSVals %1:sub0:  // this strange notation means %1 is going to be joined into sub0 of the joined full reg
  			0 at 128r Write:0000000000000003 Valid:0000000000000000 Keep ImpDef -> 0 at 128r, 
  			1 at 80r Write:0000000000000003 Valid:0000000000000003 Erase Other:3 at 64r -> 3 at 64r, 
  			2 at 176B-phi Write:0000000000000003 Valid:0000000000000003 Merge Other:4 at 176B-phi -> 4 at 176B-phi
  LHSVals %0: 
  			0 at 144r Write:0000000000000003 Valid:0000000000000003 Erase Other:0 at 128r ImpDef -> 0 at 128r, 
  			1 at 48r Write:0000000000000003 Valid:0000000000000003 Keep -> 1 at 48r, 
  			2 at 160r Write:000000000000000C Valid:000000000000000F Erase Other:0 at 128r Redef:0 at 144r ImpDef -> 0 at 128r, 
  			3 at 64r Write:000000000000000C Valid:000000000000000F Keep Redef:1 at 48r -> 3 at 64r, 
  			4 at 176B-phi Write:FFFFFFFFFFFFFFFF Valid:FFFFFFFFFFFFFFFF Keep Other:2 at 176B-phi -> 4 at 176B-phi

`128B	  %1:sgpr_32 = IMPLICIT_DEF`
This is keeped, as there is no other "incoming" value:
RHS: 0 at 128r Write:0000000000000003 Valid:0000000000000000 **Keep** ImpDef -> 0 at 128r,

`144B	  undef %0.sub0:sgpr_64 = IMPLICIT_DEF`
This one is erased as %1 (joining counterpart) is already have some value, that is the RHS:0 at 128r (IMPLICIT_DEF) from the intruction above:
LHS: 0 at 144r Write:0000000000000003 Valid:0000000000000003 **Erase Other:0 at 128r** ImpDef -> 0 at 128r,

`160B	  %0.sub1:sgpr_64 = IMPLICIT_DEF`
This is also erased becasue of the incoming RHS:0 at 128r:
LHS: 2 at 160r Write:000000000000000C Valid:000000000000000F **Erase Other:0 at 128r** Redef:0 at 144r ImpDef -> 0 at 128r,

So after the processing the only instruction left is:
`128B	  %1:sgpr_32 = IMPLICIT_DEF`

When the join is finalized %1 becomes %0.sub0 and the initialization gets undef flag as the first assignment to %0 on that path.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82258/new/

https://reviews.llvm.org/D82258