[PATCH] D87842: [SVE] Use NEON for extract_vector_elt when the index is in range.

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:9051
+        VT == MVT::nxv16i1 || VT == MVT::nxv2f16 || VT == MVT::nxv4f16 ||
+        VT == MVT::nxv2f32 || VT == MVT::nxv2bf16 || VT == MVT::nxv4bf16)
+      return Op;
----------------
efriedma wrote:
> I assume we could handle nxv2f16 if we wanted to?  I guess the indexing gets a little more complicated.
We can but currently EXTRACT_VECTOR_ELT doesn't support any of the unpacked types so I didn't bother considering them because I'm mainly concerned with maintaining code quality for D87843.  Although this means the code is wrong because it's incorrectly reporting the nodes as legal, so I'll just remove this block.


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:9074
+    return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, Op.getValueType(),
+                       Bottom128, Op.getOperand(1));
+  }
----------------
efriedma wrote:
> Is there some reason to do this as custom lowering, as opposed to just writing this directly as an iel pattern?
I just figured it was better to reuse the existing patterns?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87842/new/

https://reviews.llvm.org/D87842