[PATCH] D87744: [RegisterCoalescer] passs Undefs to extendToIndices()

Thu Sep 17 07:29:09 PDT 2020

arsenm added inline comments.

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Comment at: llvm/test/CodeGen/AMDGPU/coalescer-removepartial-extend-undef-subrange.mir:29
+  bb.0:
+    successors: %bb.1, %bb.2
+    liveins: $sgpr2, $sgpr3, $vgpr3
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ruiling wrote:
> arsenm wrote:
> > Can you reduce this any further? -run-pass=none will also compact the register numbers
> I just tried to remove each one of the most blocks containing instructions in MIR, I failed to trigger the crash after removing them. If you have any good idea to simplify further, I can try it. Some more notes: The test case is already a much simplified version than original failure IR with 100+ basic blocks. I have tried removing each basic block in IR before and it would cause problem disappear. The problem is hard to trigger, it also depends on the order of coalescing work. For example, if I reorder the blocks, the problem may disappear because the coalescing of registers will be different then.
I've reduced coalescer cases by dumping the MIR at intermediate points during the coalescer. Presumably not every step is relevant to get to the problem

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https://reviews.llvm.org/D87744