[PATCH] D87232: [SVE][CodeGen] Lower floating point -> integer conversions

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm accepted this revision.
paulwalker-arm added a comment.
This revision is now accepted and ready to land.

LGTM assuming adding the missing tests don't throw up anything unexpected.



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Comment at: llvm/test/CodeGen/AArch64/sve-fcvt.ll:21
+}
+
+define <vscale x 4 x i16> @fcvtzs_h_nxv4f16(<vscale x 4 x half> %a) {
----------------
Perhaps worth adding tests for:
fcvtz[s,u]_h_nxv2f32
fcvtz[s,u]_h_nxv2f64
fcvtz[s,u]_h_nxv4f32


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Comment at: llvm/test/CodeGen/AArch64/sve-fcvt.ll:126
+
+define <vscale x 2 x i16> @fcvtzu_h_nxv2f16(<vscale x 2 x half> %a) {
+; CHECK-LABEL: fcvtzu_h_nxv2f16:
----------------
I know it's in the langref but it cannot hurt to add a comment here along the lines of `NOTE: Using fcvtzs is safe because fptoui overflow is considered poison and a 64bit signed value encompasses the entire range of a 16bit unsigned value. ` What do you think?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87232/new/

https://reviews.llvm.org/D87232