[PATCH] D87538: [VectorCombine] Don't vectorize scalar load under asan/hwasan/memtag/tsan

[Sanjay Patel via Phabricator via llvm-commits]

spatel accepted this revision.
spatel added inline comments.


================
Comment at: llvm/test/Transforms/VectorCombine/X86/load.ll:459
+
+define <2 x float> @load_f32_insert_v2f32_asan(float* align 16 dereferenceable(16) %p) sanitize_address {
+; CHECK-LABEL: @load_f32_insert_v2f32_asan(
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MaskRay wrote:
> spatel wrote:
> > Does this test a different code path than the first added test (`gep10_load_i16_insert_v8i16_asan`)?
> It is for D86160. If you think it is unneeded I can delete it.
> 
> Do you have more concerns?
Nope - let's keep it to verify that we are fully disabling the load transforms for the sanitizer cases.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87538/new/

https://reviews.llvm.org/D87538