[PATCH] D87569: [Legalize][ARM][X86] Add float legalization for VECREDUCE

Nikita Popov via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Sep 13 06:26:45 PDT 2020


nikic updated this revision to Diff 291455.
nikic retitled this revision from "[LegalizeFloatType][ARM] Add float legalization for VECREDUCE" to "[Legalize][ARM][X86] Add float legalization for VECREDUCE".
nikic edited the summary of this revision.
nikic added a comment.

Add SoftPromoteHalfRes as well. As we do expand non-fast reductions on X86, we can run into it there. The added tests were previously asserting.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87569/new/

https://reviews.llvm.org/D87569

Files:
  llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
  llvm/lib/Target/ARM/ARMTargetTransformInfo.h
  llvm/test/CodeGen/ARM/vecreduce-fadd-legalization-soft-float.ll
  llvm/test/CodeGen/X86/vector-reduce-fmax-nnan.ll
  llvm/test/CodeGen/X86/vector-reduce-fmin-nnan.ll

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