[PATCH] D82709: [MachineLICM] [PowerPC] hoisting rematerializable cheap instructions based on register pressure.

[Quentin Colombet via Phabricator via llvm-commits]

qcolombet added a comment.

Hi @shchenz,

Sorry for the late reply I missed your update.

> I checked the log, when we do spill for %0, LIS instruction, for example %157, is assigned with physical register,  but seems RA will only remat instructions when the remat instructions are going to be spilled?

That's correct, but a live-range can still evict another one, e.g., when we assign %88, we evict %0.

> We should add logic inside selectOrSplitImpl like: when we try to spill a non-remat instruction, we should check if there is any remat instruction assigned with a physical register. If there is one, we should first remat the remat instruction and assign the physical register to the spilled one? Is this a reasonable change in RA?

That part should actually be covered. If you look at `RAGreedy::shouldEvict`, a live-interval can evict another one as long as its weight is bigger than the other one. Generally, the weight of rematerializable  live intervals is small enough that it can be evicted pretty much all the time.
It doesn't happen in your case because the weight of %0 is pretty small and in particular, smaller than the rematerializable live-intervals (e.g., %157).

At this point, I would check two things:

1. Are the weights accurate? E.g., maybe the frequency estimate missed a loop?
2. Is %157 (or whatever rematerializable interval) considered when we call shouldEvict for %0?

If the answer to #2 is yes, then I think your problem is with #1. If it is no, we should check why.

Now, if the weights for #1 are accurate, then the cost model means that it is more expensive to rematerialize than to spill.

Cheers,
-Quentin


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  https://reviews.llvm.org/D82709/new/

https://reviews.llvm.org/D82709