[PATCH] D86548: [SVE][CodeGen] Legalisation of truncate for scalable vectors

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm accepted this revision.
paulwalker-arm added a comment.
This revision is now accepted and ready to land.

Looks good assuming the new test doesn't throw up any surprises.



================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:13031
 
+static SDValue performUzpCombine(SDNode *N, SelectionDAG &DAG) {
+  SDLoc DL(N);
----------------
Stylistically this function could do with a few blank lines and is perhaps clearer if the two UzpOp variables are named X and Z respectively. 


================
Comment at: llvm/test/CodeGen/AArch64/sve-split-trunc.ll:21
+}
+
+define <vscale x 4 x i32> @trunc_i64toi32(<vscale x 4 x i64> %in) {
----------------
You're missing trunc_i32toi8 for the complete collection.


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  https://reviews.llvm.org/D86548/new/

https://reviews.llvm.org/D86548