[PATCH] D87231: [AArch64] ExtractElement is free when combined with pairwise add

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

I think the best option would be to start generating reduction intrinsics in IR, ensure cost models are accurate for them and do all we can to coax the vectorizers to recognize them (inc. partial reduction patterns) - I've been playing whack-a-mole with improving HorizOp patterns in the backend for years now and its not fun any more :-(

The plan to drop the experimental tags from the reduction intrinsics keeps getting delayed - I think due to a couple of minor issues - efficient non pow-2 type handling and inf/nan handling for fp types are the ones that @spatel reminded me about recently.


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  https://reviews.llvm.org/D87231/new/

https://reviews.llvm.org/D87231