[PATCH] D87280: [ARM] Try to rematerialize VCTP instructions

Sjoerd Meijer via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 8 05:43:03 PDT 2020


SjoerdMeijer added inline comments.


================
Comment at: llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp:6138
+
+bool ARMBaseInstrInfo::isReallyTriviallyReMaterializable(const MachineInstr &MI,
+                                                         AAResults *AA) const {
----------------
Since I don't think this there's much difference in really trivial and trivial, probably `isTriviallyReMaterializable` is enough to capture this.


================
Comment at: llvm/test/CodeGen/Thumb2/LowOverheadLoops/remat-vctp.ll:15
+; CHECK-NEXT:    @ =>This Inner Loop Header: Depth=1
+; CHECK-NEXT:    vctp.32 r12
+; CHECK-NEXT:    vpst
----------------
I haven't seen the codegen before this change, so it wasn't immediately clear to me what exactly the clue here is. I.e., is this testing something that isn't tested with the other changed tests? I am guessing the high register pressure? 
Perhaps function name `arm_vdiv_q31_mve` can be made a bit more informative.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87280/new/

https://reviews.llvm.org/D87280



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