[llvm] 247d023 - [Test] Auto-generated checks for some IndVarSimplify tests
Max Kazantsev via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 7 21:15:55 PDT 2020
Author: Max Kazantsev
Date: 2020-09-08T11:15:40+07:00
New Revision: 247d02396524649a31bc45541f97457e32b8ef48
URL: https://github.com/llvm/llvm-project/commit/247d02396524649a31bc45541f97457e32b8ef48
DIFF: https://github.com/llvm/llvm-project/commit/247d02396524649a31bc45541f97457e32b8ef48.diff
LOG: [Test] Auto-generated checks for some IndVarSimplify tests
Added:
Modified:
llvm/test/Transforms/IndVarSimplify/canonicalize-cmp.ll
llvm/test/Transforms/IndVarSimplify/lftr-multi-exit.ll
llvm/test/Transforms/IndVarSimplify/pr18223.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/IndVarSimplify/canonicalize-cmp.ll b/llvm/test/Transforms/IndVarSimplify/canonicalize-cmp.ll
index 2b939767284a..7c4bad11a5ea 100644
--- a/llvm/test/Transforms/IndVarSimplify/canonicalize-cmp.ll
+++ b/llvm/test/Transforms/IndVarSimplify/canonicalize-cmp.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -indvars < %s | FileCheck %s
; Check that we replace signed comparisons between non-negative values with
@@ -6,13 +7,35 @@
target datalayout = "n8:16:32:64"
define i32 @test_01(i32 %a, i32 %b, i32* %p) {
-
; CHECK-LABEL: @test_01(
-; CHECK-NOT: icmp slt
-; CHECK: %cmp1 = icmp ult i32 %iv, 100
-; CHECK: %cmp2 = icmp ult i32 %iv, 100
-; CHECK-NOT: %cmp3
-; CHECK: %exitcond = icmp ne i32 %iv.next, 1000
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LOOP_ENTRY:%.*]]
+; CHECK: loop.entry:
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_BE:%.*]] ]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ult i32 [[IV]], 100
+; CHECK-NEXT: br i1 [[CMP1]], label [[B1:%.*]], label [[B2:%.*]]
+; CHECK: b1:
+; CHECK-NEXT: store i32 [[IV]], i32* [[P:%.*]], align 4
+; CHECK-NEXT: br label [[MERGE:%.*]]
+; CHECK: b2:
+; CHECK-NEXT: store i32 [[A:%.*]], i32* [[P]], align 4
+; CHECK-NEXT: br label [[MERGE]]
+; CHECK: merge:
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ult i32 [[IV]], 100
+; CHECK-NEXT: br i1 [[CMP2]], label [[B3:%.*]], label [[B4:%.*]]
+; CHECK: b3:
+; CHECK-NEXT: store i32 [[IV]], i32* [[P]], align 4
+; CHECK-NEXT: br label [[LOOP_BE]]
+; CHECK: b4:
+; CHECK-NEXT: store i32 [[B:%.*]], i32* [[P]], align 4
+; CHECK-NEXT: br label [[LOOP_BE]]
+; CHECK: loop.be:
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[IV_NEXT]], 1000
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP_ENTRY]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: ret i32 999
+;
entry:
br label %loop.entry
@@ -52,13 +75,35 @@ exit:
}
define i32 @test_02(i32 %a, i32 %b, i32* %p) {
-
; CHECK-LABEL: @test_02(
-; CHECK-NOT: icmp sgt
-; CHECK: %cmp1 = icmp ugt i32 100, %iv
-; CHECK: %cmp2 = icmp ugt i32 100, %iv
-; CHECK-NOT: %cmp3
-; CHECK: %exitcond = icmp ne i32 %iv.next, 1000
+; CHECK-NEXT: entry:
+; CHECK-NEXT: br label [[LOOP_ENTRY:%.*]]
+; CHECK: loop.entry:
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_BE:%.*]] ]
+; CHECK-NEXT: [[CMP1:%.*]] = icmp ugt i32 100, [[IV]]
+; CHECK-NEXT: br i1 [[CMP1]], label [[B1:%.*]], label [[B2:%.*]]
+; CHECK: b1:
+; CHECK-NEXT: store i32 [[IV]], i32* [[P:%.*]], align 4
+; CHECK-NEXT: br label [[MERGE:%.*]]
+; CHECK: b2:
+; CHECK-NEXT: store i32 [[A:%.*]], i32* [[P]], align 4
+; CHECK-NEXT: br label [[MERGE]]
+; CHECK: merge:
+; CHECK-NEXT: [[CMP2:%.*]] = icmp ugt i32 100, [[IV]]
+; CHECK-NEXT: br i1 [[CMP2]], label [[B3:%.*]], label [[B4:%.*]]
+; CHECK: b3:
+; CHECK-NEXT: store i32 [[IV]], i32* [[P]], align 4
+; CHECK-NEXT: br label [[LOOP_BE]]
+; CHECK: b4:
+; CHECK-NEXT: store i32 [[B:%.*]], i32* [[P]], align 4
+; CHECK-NEXT: br label [[LOOP_BE]]
+; CHECK: loop.be:
+; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
+; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[IV_NEXT]], 1000
+; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP_ENTRY]], label [[EXIT:%.*]]
+; CHECK: exit:
+; CHECK-NEXT: ret i32 999
+;
entry:
br label %loop.entry
diff --git a/llvm/test/Transforms/IndVarSimplify/lftr-multi-exit.ll b/llvm/test/Transforms/IndVarSimplify/lftr-multi-exit.ll
index 66951eda7a57..7dfd4ebc0015 100644
--- a/llvm/test/Transforms/IndVarSimplify/lftr-multi-exit.ll
+++ b/llvm/test/Transforms/IndVarSimplify/lftr-multi-exit.ll
@@ -19,7 +19,7 @@ define void @analyzeable_early_exit(i32 %n) {
; CHECK-NEXT: br i1 [[EXITCOND]], label [[LATCH]], label [[EXIT:%.*]]
; CHECK: latch:
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
-; CHECK-NEXT: store i32 [[IV]], i32* @A
+; CHECK-NEXT: store i32 [[IV]], i32* @A, align 4
; CHECK-NEXT: [[EXITCOND1:%.*]] = icmp ne i32 [[IV_NEXT]], 1000
; CHECK-NEXT: br i1 [[EXITCOND1]], label [[LOOP]], label [[EXIT]]
; CHECK: exit:
@@ -49,12 +49,12 @@ define void @unanalyzeable_early_exit() {
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LATCH:%.*]] ]
-; CHECK-NEXT: [[VOL:%.*]] = load volatile i32, i32* @A
+; CHECK-NEXT: [[VOL:%.*]] = load volatile i32, i32* @A, align 4
; CHECK-NEXT: [[EARLYCND:%.*]] = icmp ne i32 [[VOL]], 0
; CHECK-NEXT: br i1 [[EARLYCND]], label [[LATCH]], label [[EXIT:%.*]]
; CHECK: latch:
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
-; CHECK-NEXT: store i32 [[IV]], i32* @A
+; CHECK-NEXT: store i32 [[IV]], i32* @A, align 4
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[IV_NEXT]], 1000
; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT]]
; CHECK: exit:
@@ -89,12 +89,12 @@ define void @multiple_early_exits(i32 %n, i32 %m) {
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[IV]], [[N:%.*]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[CONTINUE:%.*]], label [[EXIT:%.*]]
; CHECK: continue:
-; CHECK-NEXT: store volatile i32 [[IV]], i32* @A
+; CHECK-NEXT: store volatile i32 [[IV]], i32* @A, align 4
; CHECK-NEXT: [[EXITCOND1:%.*]] = icmp ne i32 [[IV]], [[M:%.*]]
; CHECK-NEXT: br i1 [[EXITCOND1]], label [[LATCH]], label [[EXIT]]
; CHECK: latch:
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
-; CHECK-NEXT: store volatile i32 [[IV]], i32* @A
+; CHECK-NEXT: store volatile i32 [[IV]], i32* @A, align 4
; CHECK-NEXT: [[EXITCOND2:%.*]] = icmp ne i32 [[IV_NEXT]], 1000
; CHECK-NEXT: br i1 [[EXITCOND2]], label [[LOOP]], label [[EXIT]]
; CHECK: exit:
@@ -137,7 +137,7 @@ define void @compound_early_exit(i32 %n, i32 %m) {
; CHECK-NEXT: br i1 [[EXITCOND]], label [[LATCH]], label [[EXIT:%.*]]
; CHECK: latch:
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
-; CHECK-NEXT: store volatile i32 [[IV]], i32* @A
+; CHECK-NEXT: store volatile i32 [[IV]], i32* @A, align 4
; CHECK-NEXT: [[EXITCOND1:%.*]] = icmp ne i32 [[IV_NEXT]], 1000
; CHECK-NEXT: br i1 [[EXITCOND1]], label [[LOOP]], label [[EXIT]]
; CHECK: exit:
@@ -174,8 +174,8 @@ define void @unanalyzeable_latch(i32 %n) {
; CHECK-NEXT: br i1 [[EXITCOND]], label [[LATCH]], label [[EXIT:%.*]]
; CHECK: latch:
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
-; CHECK-NEXT: store i32 [[IV]], i32* @A
-; CHECK-NEXT: [[VOL:%.*]] = load volatile i32, i32* @A
+; CHECK-NEXT: store i32 [[IV]], i32* @A, align 4
+; CHECK-NEXT: [[VOL:%.*]] = load volatile i32, i32* @A, align 4
; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[VOL]], 1000
; CHECK-NEXT: br i1 [[C]], label [[LOOP]], label [[EXIT]]
; CHECK: exit:
@@ -210,7 +210,7 @@ define void @single_exit_no_latch(i32 %n) {
; CHECK-NEXT: br i1 [[EXITCOND]], label [[LATCH]], label [[EXIT:%.*]]
; CHECK: latch:
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
-; CHECK-NEXT: store i32 [[IV]], i32* @A
+; CHECK-NEXT: store i32 [[IV]], i32* @A, align 4
; CHECK-NEXT: br label [[LOOP]]
; CHECK: exit:
; CHECK-NEXT: ret void
@@ -243,11 +243,11 @@ define void @no_latch_exit(i32 %n, i32 %m) {
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[IV]], [[N:%.*]]
; CHECK-NEXT: br i1 [[EXITCOND]], label [[CONTINUE:%.*]], label [[EXIT:%.*]]
; CHECK: continue:
-; CHECK-NEXT: store volatile i32 [[IV]], i32* @A
+; CHECK-NEXT: store volatile i32 [[IV]], i32* @A, align 4
; CHECK-NEXT: [[EXITCOND1:%.*]] = icmp ne i32 [[IV]], [[M:%.*]]
; CHECK-NEXT: br i1 [[EXITCOND1]], label [[LATCH]], label [[EXIT]]
; CHECK: latch:
-; CHECK-NEXT: store volatile i32 [[IV]], i32* @A
+; CHECK-NEXT: store volatile i32 [[IV]], i32* @A, align 4
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
; CHECK-NEXT: br label [[LOOP]]
; CHECK: exit:
@@ -287,7 +287,7 @@ define void @combine_ivs(i32 %n) {
; CHECK-NEXT: br i1 [[EXITCOND]], label [[LATCH]], label [[EXIT:%.*]]
; CHECK: latch:
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
-; CHECK-NEXT: store volatile i32 [[IV]], i32* @A
+; CHECK-NEXT: store volatile i32 [[IV]], i32* @A, align 4
; CHECK-NEXT: [[EXITCOND1:%.*]] = icmp ne i32 [[IV_NEXT]], 999
; CHECK-NEXT: br i1 [[EXITCOND1]], label [[LOOP]], label [[EXIT]]
; CHECK: exit:
@@ -324,7 +324,7 @@ define void @combine_ivs2(i32 %n) {
; CHECK-NEXT: br i1 [[EXITCOND]], label [[LATCH]], label [[EXIT:%.*]]
; CHECK: latch:
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
-; CHECK-NEXT: store volatile i32 [[IV]], i32* @A
+; CHECK-NEXT: store volatile i32 [[IV]], i32* @A, align 4
; CHECK-NEXT: [[EXITCOND1:%.*]] = icmp ne i32 [[IV_NEXT]], 1000
; CHECK-NEXT: br i1 [[EXITCOND1]], label [[LOOP]], label [[EXIT]]
; CHECK: exit:
@@ -362,7 +362,7 @@ define void @simplify_exit_test(i32 %n) {
; CHECK-NEXT: br i1 [[EXITCOND]], label [[LATCH]], label [[EXIT:%.*]]
; CHECK: latch:
; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
-; CHECK-NEXT: store volatile i32 [[IV]], i32* @A
+; CHECK-NEXT: store volatile i32 [[IV]], i32* @A, align 4
; CHECK-NEXT: [[EXITCOND1:%.*]] = icmp ne i32 [[IV_NEXT]], 65
; CHECK-NEXT: br i1 [[EXITCOND1]], label [[LOOP]], label [[EXIT]]
; CHECK: exit:
@@ -396,13 +396,13 @@ define void @simplify_exit_test2(i32 %n) {
; CHECK-NEXT: br label [[LOOP:%.*]]
; CHECK: loop:
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LATCH:%.*]] ]
-; CHECK-NEXT: [[VOL:%.*]] = load volatile i32, i32* @A
+; CHECK-NEXT: [[VOL:%.*]] = load volatile i32, i32* @A, align 4
; CHECK-NEXT: [[EARLYCND:%.*]] = icmp ne i32 [[VOL]], 0
; CHECK-NEXT: br i1 [[EARLYCND]], label [[LATCH]], label [[EXIT:%.*]]
; CHECK: latch:
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
; CHECK-NEXT: [[FX:%.*]] = udiv i32 [[IV]], 4
-; CHECK-NEXT: store volatile i32 [[IV]], i32* @A
+; CHECK-NEXT: store volatile i32 [[IV]], i32* @A, align 4
; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[FX]], 1024
; CHECK-NEXT: br i1 [[C]], label [[LOOP]], label [[EXIT]]
; CHECK: exit:
@@ -442,12 +442,12 @@ define void @nested(i32 %n) {
; CHECK-NEXT: br label [[OUTER:%.*]]
; CHECK: outer:
; CHECK-NEXT: [[IV1:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV1_NEXT:%.*]], [[OUTER_LATCH:%.*]] ]
-; CHECK-NEXT: store volatile i32 [[IV1]], i32* @A
+; CHECK-NEXT: store volatile i32 [[IV1]], i32* @A, align 4
; CHECK-NEXT: [[IV1_NEXT]] = add nuw nsw i32 [[IV1]], 1
; CHECK-NEXT: br label [[INNER:%.*]]
; CHECK: inner:
; CHECK-NEXT: [[IV2:%.*]] = phi i32 [ 0, [[OUTER]] ], [ [[IV2_NEXT:%.*]], [[INNER_LATCH:%.*]] ]
-; CHECK-NEXT: store volatile i32 [[IV2]], i32* @A
+; CHECK-NEXT: store volatile i32 [[IV2]], i32* @A, align 4
; CHECK-NEXT: [[IV2_NEXT]] = add nuw nsw i32 [[IV2]], 1
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i32 [[IV2]], 20
; CHECK-NEXT: br i1 [[EXITCOND]], label [[INNER_LATCH]], label [[EXIT_LOOPEXIT:%.*]]
diff --git a/llvm/test/Transforms/IndVarSimplify/pr18223.ll b/llvm/test/Transforms/IndVarSimplify/pr18223.ll
index f922aa424a17..da620c806219 100644
--- a/llvm/test/Transforms/IndVarSimplify/pr18223.ll
+++ b/llvm/test/Transforms/IndVarSimplify/pr18223.ll
@@ -1,12 +1,28 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -indvars -S < %s | FileCheck %s
; indvars should transform the phi node pair from the for-loop
-; CHECK-LABEL: @main(
-; CHECK: ret = phi i32 [ 0, %entry ], [ 0, {{.*}} ]
@c = common global i32 0, align 4
define i32 @main() #0 {
+; CHECK-LABEL: @main(
+; CHECK-NEXT: entry:
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @c, align 4
+; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP0]], 0
+; CHECK-NEXT: br i1 [[TOBOOL]], label [[FOR_BODY_PREHEADER:%.*]], label [[EXIT:%.*]]
+; CHECK: for.body.preheader:
+; CHECK-NEXT: br label [[FOR_BODY:%.*]]
+; CHECK: for.body:
+; CHECK-NEXT: br label [[FOR_INC:%.*]]
+; CHECK: for.inc:
+; CHECK-NEXT: br i1 false, label [[FOR_BODY]], label [[EXIT_LOOPEXIT:%.*]]
+; CHECK: exit.loopexit:
+; CHECK-NEXT: br label [[EXIT]]
+; CHECK: exit:
+; CHECK-NEXT: [[RET:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ 0, [[EXIT_LOOPEXIT]] ]
+; CHECK-NEXT: ret i32 [[RET]]
+;
entry:
%0 = load i32, i32* @c, align 4
%tobool = icmp eq i32 %0, 0
More information about the llvm-commits
mailing list