[llvm] 62f89a8 - [Hexagon] Add assertions about V6_pred_scalar2

Krzysztof Parzyszek via llvm-commits llvm-commits at lists.llvm.org
Sat Sep 5 16:20:37 PDT 2020


Author: Krzysztof Parzyszek
Date: 2020-09-05T18:20:23-05:00
New Revision: 62f89a89f312045f26ec74b73512e2080df35875

URL: https://github.com/llvm/llvm-project/commit/62f89a89f312045f26ec74b73512e2080df35875
DIFF: https://github.com/llvm/llvm-project/commit/62f89a89f312045f26ec74b73512e2080df35875.diff

LOG: [Hexagon] Add assertions about V6_pred_scalar2

Added: 
    

Modified: 
    llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp b/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
index 604d13ee874b..e5d05cfe64c4 100644
--- a/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
@@ -631,6 +631,9 @@ HexagonTargetLowering::createHvxPrefixPred(SDValue PredV, const SDLoc &dl,
     if (!ZeroFill)
       return S;
     // Fill the bytes beyond BlockLen with 0s.
+    // V6_pred_scalar2 cannot fill the entire predicate, so it only works
+    // when BlockLen < HwLen.
+    assert(BlockLen < HwLen && "vsetq(v1) prerequisite");
     MVT BoolTy = MVT::getVectorVT(MVT::i1, HwLen);
     SDValue Q = getInstr(Hexagon::V6_pred_scalar2, dl, BoolTy,
                          {DAG.getConstant(BlockLen, dl, MVT::i32)}, DAG);
@@ -1094,6 +1097,7 @@ HexagonTargetLowering::insertHvxSubvectorPred(SDValue VecV, SDValue SubV,
   // ByteVec is the target vector VecV rotated in such a way that the
   // subvector should be inserted at index 0. Generate a predicate mask
   // and use vmux to do the insertion.
+  assert(BlockLen < HwLen && "vsetq(v1) prerequisite");
   MVT BoolTy = MVT::getVectorVT(MVT::i1, HwLen);
   SDValue Q = getInstr(Hexagon::V6_pred_scalar2, dl, BoolTy,
                        {DAG.getConstant(BlockLen, dl, MVT::i32)}, DAG);
@@ -1906,6 +1910,7 @@ HexagonTargetLowering::WidenHvxStore(SDValue Op, SelectionDAG &DAG) const {
   }
   assert(ty(Value).getVectorNumElements() == HwLen);  // Paranoia
 
+  assert(ValueLen < HwLen && "vsetq(v1) prerequisite");
   MVT BoolTy = MVT::getVectorVT(MVT::i1, HwLen);
   SDValue StoreQ = getInstr(Hexagon::V6_pred_scalar2, dl, BoolTy,
                             {DAG.getConstant(ValueLen, dl, MVT::i32)}, DAG);


        


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