[PATCH] D87149: [InstCombine] erase instructions leading up to unreachable

[Sanjay Patel via Phabricator via llvm-commits]

spatel updated this revision to Diff 290082.
spatel retitled this revision from "[InstCombine] erase assume in block that ends in unreachable" to "[InstCombine] erase instructions leading up to unreachable".
spatel added a comment.

Patch updated:
Reimplemented as a "must-reach-unreachable" transform. This shows removing a store from another test.
I only realized the EHPad restriction was needed by seeing regression test crashes, so I'm not sure if that is a sufficient guard.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87149/new/

https://reviews.llvm.org/D87149

Files:
  llvm/lib/Transforms/InstCombine/InstCombineInternal.h
  llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
  llvm/test/Transforms/InstCombine/assume.ll
  llvm/test/Transforms/InstCombine/pr33689_same_bitwidth.ll


Index: llvm/test/Transforms/InstCombine/pr33689_same_bitwidth.ll
===================================================================
--- llvm/test/Transforms/InstCombine/pr33689_same_bitwidth.ll
+++ llvm/test/Transforms/InstCombine/pr33689_same_bitwidth.ll
@@ -17,8 +17,6 @@
 ; CHECK-NEXT:    [[T12_SUB:%.*]] = getelementptr inbounds [2 x i32], [2 x i32]* [[T12]], i16 0, i16 0
 ; CHECK-NEXT:    br i1 [[COND:%.*]], label [[BB1:%.*]], label [[BB2:%.*]]
 ; CHECK:       bb1:
-; CHECK-NEXT:    [[T8:%.*]] = ptrtoint [2 x i32]* [[T12]] to i16
-; CHECK-NEXT:    store i16 [[T8]], i16* @a, align 2
 ; CHECK-NEXT:    unreachable
 ; CHECK:       bb2:
 ; CHECK-NEXT:    [[T9:%.*]] = load i16*, i16** @b, align 2
Index: llvm/test/Transforms/InstCombine/assume.ll
===================================================================
--- llvm/test/Transforms/InstCombine/assume.ll
+++ llvm/test/Transforms/InstCombine/assume.ll
@@ -543,7 +543,6 @@
 
 define void @PR36270(i32 %b) {
 ; CHECK-LABEL: @PR36270(
-; CHECK-NEXT:    tail call void @llvm.assume(i1 false)
 ; CHECK-NEXT:    unreachable
 ;
   %B7 = xor i32 -1, 2147483647
@@ -573,8 +572,6 @@
 ; CHECK-NEXT:    tail call void @llvm.assume(i1 [[CMP3]])
 ; CHECK-NEXT:    br label [[EXIT]]
 ; CHECK:       exit:
-; CHECK-NEXT:    [[CMP4:%.*]] = icmp eq i32 [[X]], 2
-; CHECK-NEXT:    tail call void @llvm.assume(i1 [[CMP4]])
 ; CHECK-NEXT:    unreachable
 ;
 entry:
Index: llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
===================================================================
--- llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+++ llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
@@ -2798,6 +2798,17 @@
   return nullptr;
 }
 
+Instruction *InstCombinerImpl::visitUnreachableInst(UnreachableInst &I) {
+  // Try to remove the previous instruction if it must lead to unreachable.
+  // This includes instructions like "llvm.assume" that may not get removed by
+  // simple dead code elimination.
+  if (Instruction *Prev = I.getPrevNonDebugInstruction()) {
+    if (!Prev->isEHPad() && isGuaranteedToTransferExecutionToSuccessor(Prev))
+      return eraseInstFromFunction(*Prev);
+  }
+  return nullptr;
+}
+
 Instruction *InstCombinerImpl::visitUnconditionalBranchInst(BranchInst &BI) {
   assert(BI.isUnconditional() && "Only for unconditional branches.");
 
Index: llvm/lib/Transforms/InstCombine/InstCombineInternal.h
===================================================================
--- llvm/lib/Transforms/InstCombine/InstCombineInternal.h
+++ llvm/lib/Transforms/InstCombine/InstCombineInternal.h
@@ -159,6 +159,7 @@
   Instruction *visitFenceInst(FenceInst &FI);
   Instruction *visitSwitchInst(SwitchInst &SI);
   Instruction *visitReturnInst(ReturnInst &RI);
+  Instruction *visitUnreachableInst(UnreachableInst &I);
   Instruction *
   foldAggregateConstructionIntoAggregateReuse(InsertValueInst &OrigIVI);
   Instruction *visitInsertValueInst(InsertValueInst &IV);


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