[PATCH] D87050: GlobalISel: Add combines for G_TRUNC

[Volkan Keles via Phabricator via llvm-commits]

volkan added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll:85-86
 ; GFX8:       ; %bb.0:
-; GFX8-NEXT:    s_and_b32 s0, s0, 0xff
-; GFX8-NEXT:    s_lshl_b32 s0, s0, 7
+; GFX8-NEXT:    s_bfe_u32 s1, 7, 0x100000
+; GFX8-NEXT:    s_lshl_b32 s0, s0, s1
 ; GFX8-NEXT:    ; return to shader part epilog
----------------
arsenm wrote:
> This is strange looking. It's technically neutral but the shift amount no longer appears constant?
Here is the MIR after AMDGPUPostLegalizerCombiner:

```
bb.1 (%ir-block.0):
  liveins: $sgpr0
  %2:_(s32) = COPY $sgpr0
  %1:_(s16) = G_TRUNC %2:_(s32)
  %5:_(s32) = G_CONSTANT i32 7
  %16:_(s16) = G_TRUNC %5:_(s32)
  %15:_(s16) = nuw nsw G_SHL %1:_, %16:_(s16)
  %8:_(s32) = G_ANYEXT %15:_(s16)
  %9:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.readfirstlane), %8:_(s32)
  $sgpr0 = COPY %9:_(s32)
  SI_RETURN_TO_EPILOG implicit $sgpr0
```

Looks like it's not constant because there is no combine to transform `trunc(cst)` to `cst`. We should add that as a part of the constant folding combines.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D87050/new/

https://reviews.llvm.org/D87050