[PATCH] D86925: [MachineSink] add one more profitable pattern for sinking

ChenZheng via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 1 03:34:12 PDT 2020


shchenz created this revision.
shchenz added reviewers: MatzeB, echristo, efriedma, qcolombet, PowerPC.
Herald added subscribers: llvm-commits, arphaman, hiraditya.
Herald added a project: LLVM.
shchenz requested review of this revision.

This patch adds one profitable pattern to sink `MI` when `MI->patent()` dominates `SuccToSinkTo` and `SuccToSinkTo` post dominates `MI->patent()`.

If MI is in loop and MI is:

  def0, def1, defn = opcode, use0, use1, use2, use3

sinking MI to `SuccToSinkTo` will shorten the live range for def but will enlarge the live range for use.
But in loop, the use may be defined outside of loop, so if `SuccToSinkTo` is still in same loop, sinking MI should have no impact for the live range for the uses which are defined out of loop.

If we can know that the number for live range shortened is bigger than the number for live range enlarged(uses which are defined in the loop), we make this sinking as profitable. This sinking should be good for register pressure.

This patch together with https://reviews.llvm.org/D86864 gets some obvious improvement for some cpu2017 benchmarks.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D86925

Files:
  llvm/lib/CodeGen/MachineSink.cpp
  llvm/test/CodeGen/X86/2007-01-13-StackPtrIndex.ll

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