[PATCH] D86793: [AArch64][SVE] Add lowering for rounding operations

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:1425
 
-  defm FRINTN_ZPmZ : sve_fp_2op_p_zd_HSD<0b00000, "frintn", int_aarch64_sve_frintn>;
+  defm FRINTN_ZPmZ : sve_fp_2op_p_zd_HSD<0b00000, "frintn", int_aarch64_sve_frintn, AArch64frintn_mt>;
   defm FRINTP_ZPmZ : sve_fp_2op_p_zd_HSD<0b00001, "frintp", int_aarch64_sve_frintp, AArch64frintp_mt>;
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So we can prove the DAGCombine for these intrinsics is the canonical route, can you please change this and the following sve_frint instances to null_frag.  Once FRECPX and FSQRT follow a similar path we'll remove the parameter.


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Comment at: llvm/test/CodeGen/AArch64/sve-fp-rounding.ll:1
+; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s
+
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Since there's no expected variance for these tests can you use update_llc_test_checks.py to generate the check lines.  It'll just make it easier in the future if somebody adds anything new.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D86793/new/

https://reviews.llvm.org/D86793