[PATCH] D86147: [LangRef] Revise semantics of get.active.lane.mask

[Luke Kenneth Casson Leighton via Phabricator via llvm-commits]

lkcl added a comment.

the description in LLVMRef.rst reminds me very much of "data-dependent fail on first".  in particular, that on "overflow" the m[i] values are set to False.

given especially that the example given is for LOAD it may be worthwhile reviewing to ensure that ISAs with ffirst mask capability can be used, here.

in particular, one characteristic of ffirst on LOAD operations is that any page fault exception caused by anything other than the very first element (n=0) is IGNORED and Vector Length explicitly truncated by the hardware to the element *prior* to the exception.

if however the page fault occurs at element 0 then the exception must be raised as for any scalar operation.

Vector LOADs therefore implicitly provide information about which elements were actually successfully retrieved from memory, and parallel vector processing may take place without needing to perform any extraneous checking.

supporting this in llvm.get.active.lane.mask would result in some extremely compact assembler.


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https://reviews.llvm.org/D86147