[PATCH] D84737: [AArch64][SVE] Preserve full vector regs over EH edge.

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen updated this revision to Diff 288557.
sdesmalen added a comment.

- MIRParser now correctly marks registers as clobbered and added corresponding .mir test file.
- Updated RUN lines of unwind-preserved.ll to test with/without global isel.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D84737/new/

https://reviews.llvm.org/D84737

Files:
  llvm/include/llvm/CodeGen/TargetRegisterInfo.h
  llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
  llvm/lib/CodeGen/LiveIntervals.cpp
  llvm/lib/CodeGen/MIRParser/MIRParser.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
  llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
  llvm/lib/Target/AArch64/AArch64RegisterInfo.h
  llvm/test/CodeGen/AArch64/unwind-preserved-from-mir.mir
  llvm/test/CodeGen/AArch64/unwind-preserved.ll

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