[PATCH] D86529: [5/5] [AArch64] Generate and parse SEH assembly directives

[Martin Storsjö via Phabricator via llvm-commits]

mstorsjo added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp:5197
+      parseDirectiveSEHSetFP(Loc);
+    else if (IDVal == ".seh_addfp")
+      parseDirectiveSEHAddFP(Loc);
----------------
efriedma wrote:
> Looking at these names again, maybe we could add underscores in a few places.  The directive names should match the opcode names from https://docs.microsoft.com/en-us/cpp/build/arm64-exception-handling .
> 
> For the names that aren't directly derived from the opcodes in the spec, it probably makes sense to match x86.  Which I think the current names do; that seems fine.
Ok, will change it that way. That does indeed make it more consistent. The only inconsistency is for the simplest form `.seh_save_reg` vs x86's `.seh_savereg`, but that's not much of an issue (the actual register names can't be reused across them anyway), and makes it more consistent and nicer across all of them, from simple `.seh_save_reg` up to `.seh_save_fregp_x`.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D86529/new/

https://reviews.llvm.org/D86529